NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMX6DQCEC
Rev. 6, 11/2018
MCIMX6QxExxxxC
MCIMX6QxExxxxD
MCIMX6QxExxxxE
MCIMX6DxExxxxC
MCIMX6DxExxxxD
MCIMX6DxExxxxE
i.MX 6Dual/6Quad
Applications Processors for
Consumer Products
Package Information
FCPBGA Package
21 x 21 mm, 0.8 mm pitch
Ordering Information
See
Table 1
1
Introduction
1
The i.MX 6Dual/6Quad processors represent the latest
achievement in integrated multimedia applications
processors. These processors are part of a growing
family of multimedia-focused products that offer high
performance processing and are optimized for lowest
power consumption.
The i.MX 6Dual/6Quad processors feature advanced
implementation of the quad Arm
®
Cortex
®
-A9 core,
which operates at speeds up to 1.2 GHz. They include 2D
and 3D graphics processors, 1080p video processing,
and integrated power management. Each processor
provides a 64-bit DDR3/DDR3L/LPDDR2 memory
interface and a number of other interfaces for connecting
peripherals, such as WLAN, Bluetooth
®
, GPS, hard
drive, displays, and camera sensors.
The i.MX 6Dual/6Quad processors are specifically
useful for applications such as the following:
• Netbooks (web tablets)
• Nettops (Internet desktop devices)
2
3
4
5
6
7
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3 Signal Naming Convention . . . . . . . . . . . . . . . . . . . 8
Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1 Special Signal Considerations. . . . . . . . . . . . . . . . 19
3.2 Recommended Connections for Unused Analog
Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . 20
4.2 Power Supplies Requirements and Restrictions . . 33
4.3 Integrated LDO Voltage Regulator Parameters . . 34
4.4 PLL Electrical Characteristics . . . . . . . . . . . . . . . . 36
4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . . 37
4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 38
4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 44
4.8 Output Buffer Impedance Parameters. . . . . . . . . . 49
4.9 System Modules Timing . . . . . . . . . . . . . . . . . . . . 53
4.10 Multi-Mode DDR Controller (MMDC). . . . . . . . . . . 64
4.11 General-Purpose Media Interface (GPMI) Timing. 64
4.12 External Peripheral Interface Parameters . . . . . . . 73
Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 138
5.1 Boot Mode Configuration Pins. . . . . . . . . . . . . . . 138
5.2 Boot Devices Interfaces Allocation . . . . . . . . . . . 139
Package Information and Contact Assignments . . . . . . 141
6.1 Signal Naming Convention . . . . . . . . . . . . . . . . . 141
6.2 21 x 21 mm Package Information . . . . . . . . . . . . 142
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
NXP Reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.
Introduction
•
•
•
•
•
High-end mobile Internet devices (MID)
High-end PDAs
High-end portable media players (PMP) with HD video capability
Gaming consoles
Portable navigation devices (PND)
The i.MX 6Dual/6Quad processors offers numerous advanced features, such as:
• Applications processors—The processors enhance the capabilities of high-tier portable
applications by fulfilling the ever increasing MIPS needs of operating systems and games. The
Dynamic Voltage and Frequency Scaling (DVFS) provides significant power reduction, allowing
the device to run at lower voltage and frequency with sufficient MIPS for tasks such as audio
decode.
• Multilevel memory system—The multilevel memory system of each processor is based on the L1
instruction and data caches, L2 cache, and internal and external memory. The processors support
many types of external memory devices, including DDR3, DDR3L, LPDDR2, NOR Flash,
PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNAND™, and managed NAND,
including eMMC up to rev 4.4/4.41.
• Smart speed technology—The processors have power management throughout the device that
enables the rich suite of multimedia features and peripherals to consume minimum power in both
active and various low power modes. Smart speed technology enables the designer to deliver a
feature-rich product, requiring levels of power far lower than industry expectations.
• Dynamic voltage and frequency scaling—The processors improve the power efficiency of devices
by scaling the voltage and frequency to optimize performance.
• Multimedia powerhouse—The multimedia performance of each processor is enhanced by a
multilevel cache system, Neon
®
MPE (Media Processor Engine) co-processor, a multi-standard
hardware video codec, 2 autonomous and independent image processing units (IPU), and a
programmable smart DMA (SDMA) controller.
• Powerful graphics acceleration—Each processor provides three independent, integrated graphics
processing units: an OpenGL
®
ES 2.0 3D graphics accelerator with four shaders (up to 200 MTri/s
and OpenCL support), 2D graphics accelerator, and dedicated OpenVG™ 1.1 accelerator.
• Interface flexibility—Each processor supports connections to a variety of interfaces: LCD
controller for up to four displays (including parallel display, HDMI1.4, MIPI display, and LVDS
display), dual CMOS sensor interface (parallel or through MIPI), high-speed USB on-the-go with
PHY, high-speed USB host with PHY, multiple expansion card ports (high-speed MMC/SDIO host
and other), 10/100/1000 Mbps Gigabit Ethernet controller, and a variety of other popular interfaces
(such as UART, I
2
C, and I
2
S serial audio, SATA-II, and PCIe-II).
• Advanced security—The processors deliver hardware-enabled security features that enable secure
e-commerce, digital rights management (DRM), information encryption, secure boot, and secure
software downloads. The security features are discussed in detail in the i.MX 6Dual/6Quad
security reference manual (IMX6DQ6SDLSRM).
• Integrated power management—The processors integrate linear regulators and internally generate
voltage levels for different domains. This significantly simplifies system power management
structure.
i.MX 6Dual/6Quad Applications Processors for Consumer Products, Rev. 6, 11/2018
2
NXP Semiconductors
Introduction
1.1
Ordering Information
Table 1
shows examples of orderable part numbers covered by this data sheet. This table does not include
all possible orderable part numbers. The latest part numbers are available on
nxp.com/imx6series.
If your
desired part number is not listed in the table, or you have questions about available parts, see
nxp.com/imx6series
or contact your NXP representative.
Table 1. Example Orderable Part Numbers
Part Number
MCIMX6Q5EYM10AC
MCIMX6Q5EYM10AD
MCIMX6Q5EYM10AE
SCIMX6Q5EYM10CC
SCIMX6Q5EYM10CD
SCIMX6Q5EYM10CE
MCIMX6D5EYM10AC
MCIMX6D5EYM10AD
MCIMX6D5EYM10AE
SCIMX6D5EYM10CC
SCIMX6D5EYM10CD
SCIMX6D5EYM10CE
MCIMX6Q5EYM12AC
MCIMX6Q5EYM12AD
MCIMX6Q5EYM12AE
SCIMX6Q5EYM12CC
SCIMX6Q5EYM12CD
Quad/Dual CPU
i.MX 6Quad
i.MX 6Quad
i.MX 6Quad
i.MX 6Quad
i.MX 6Quad
i.MX 6Quad
i.MX 6Dual
i.MX 6Dual
i.MX 6Dual
i.MX 6Dual
i.MX 6Dual
i.MX 6Dual
i.MX 6Quad
i.MX 6Quad
i.MX 6Quad
i.MX 6Quad
i.MX 6Quad
Options
Includes VPU, GPU
Includes VPU, GPU
Includes VPU, GPU
Includes VPU, GPU,
HDCP
Includes VPU, GPU,
HDCP
Includes VPU, GPU,
HDCP
Includes VPU, GPU
Includes VPU, GPU
Includes VPU, GPU
Includes VPU, GPU,
HDCP
Includes VPU, GPU,
HDCP
Includes VPU, GPU,
HDCP
Includes VPU, GPU
Includes VPU, GPU
Includes VPU, GPU
Includes VPU, GPU,
HCP
Includes VPU, GPU,
HCP
Speed
1
Grade
1 GHz
1 GHz
1 GHz
1 GHz
1 GHz
1 GHz
1 GHz
1 GHz
1 GHz
1 GHz
1 GHz
1 GHz
1.2 GHz
1.2 GHz
1.2 GHz
1.2 GHz
1.2 GHz
Temperature
Grade
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Package
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
i.MX 6Dual/6Quad Applications Processors for Consumer Products, Rev. 6, 11/2018
NXP Semiconductors
3
Introduction
Table 1. Example Orderable Part Numbers (continued)
Part Number
SCIMX6Q5EYM12CE
MCIMX6D5EYM12AC
MCIMX6D5EYM12AD
MCIMX6D5EYM12AE
SCIMX6D5EYM12CC
SCIMX6D5EYM12CD
SCIMX6D5EYM12CE
1
Quad/Dual CPU
i.MX 6Quad
i.MX 6Dual
i.MX 6Dual
i.MX 6Dual
i.MX 6Dual
i.MX 6Dual
i.MX 6Dual
Options
Includes VPU, GPU,
HCP
Includes VPU, GPU
Includes VPU, GPU
Includes VPU, GPU
Includes VPU, GPU,
HCP
Includes VPU, GPU,
HCP
Includes VPU, GPU,
HCP
Speed
1
Grade
1.2 GHz
1.2 GHz
1.2 GHz
1.2 GHz
1.2 GHz
1.2 GHz
1.2 GHz
Temperature
Grade
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Extended
Commercial
Package
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
21 mm x 21 mm, 0.8 mm
pitch, FCPBGA (non-lidded)
If a 24 MHz input clock is used (required for USB), the maximum SoC speed is limited to 996 MHz.
Figure 1
describes the part number nomenclature to identify the characteristics of the specific part number
you have (for example, cores, frequency, temperature grade, fuse options, silicon revision).
Figure 1
applies to the i.MX 6Dual/6Quad.
The two characteristics that identify which data sheet a specific part applies to are the part number series
field and the temperature grade (junction) field:
• The i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors data sheet
(IMX6DQAEC) covers parts listed with “A (Automotive temp)”
• The i.MX 6Dual/6Quad Applications Processors for Consumer Products data sheet (IMX6DQCEC)
covers parts listed with “D (Commercial temp)” or “E (Extended Commercial temp)”
• The i.MX 6Dual/6Quad Applications Processors for Industrial Products data sheet (IMX6DQIEC)
covers parts listed with “C (Industrial temp)”
The Ensure that you have the right data sheet for your specific part by checking the temperature grade
(junction) field and matching it to the right data sheet. If you have questions, see nxp.com/imx6series or
contact your NXP representative.
i.MX 6Dual/6Quad Applications Processors for Consumer Products, Rev. 6, 11/2018
4
NXP Semiconductors
Introduction
MC
Qualification level
Prototype Samples
Mass Production
Special
IMX6
MC
PC
MC
SC
X
@
+
VV
$$
%
A
Silicon revision
1
Rev 1.2
Rev 1.3
Rev 1.6
A
C
D
E
Part # series
i.MX 6Quad
i.MX 6Dual
Part differentiator
X
Q
D
@
7
6
5
4
Fusing
Default setting
HDCP enabled
%
A
C
Frequency
800 MHz
2
(Industrial grade)
852 MHz (Automotive grade)
1 GHz
3
1.2 GHz
$$
08
08
10
12
RoHS
Industrial with VPU, GPU, no MLB
Automotive with VPU, GPU
Consumer with VPU, GPU
Automotive with GPU, no VPU
Temperature Tj
Extended commercial: -20 to +105
°
C
Industrial: -40 to +105
°
C
Automotive: -40 to +125
°
C
+
E
C
A
Package type
FCPBGA 21x21 0.8mm (lidded)
FCPBGA 21x21 0.8mm (non lidded)
VT
YM
1. See the nxp.com\imx6series Web page for latest information on the available silicon revision.
2. If a 24 MHz input clock is used (required for USB), the maximum SoC speed is limited to 792 MHz.
3. If a 24 MHz input clock is used (required for USB), the maximum SoC speed is limited to 996 MHz.
Figure 1. Part Number Nomenclature—i.MX 6Quad and i.MX 6Dual
1.2
Features
The i.MX 6Dual/6Quad processors are based on Arm Cortex-A9 MPCore platform, which has the
following features:
• Arm Cortex-A9 MPCore 4xCPU processor (with TrustZone
®
)
• The core configuration is symmetric, where each core includes:
— 32 KByte L1 Instruction Cache
— 32 KByte L1 Data Cache
— Private Timer and Watchdog
— Cortex-A9 NEON MPE (Media Processing Engine) Co-processor
The Arm Cortex-A9 MPCore complex includes:
• General Interrupt Controller (GIC) with 128 interrupt support
• Global Timer
• Snoop Control Unit (SCU)
• 1 MB unified I/D L2 cache, shared by two/four cores
• Two Master AXI (64-bit) bus interfaces output of L2 cache
i.MX 6Dual/6Quad Applications Processors for Consumer Products, Rev. 6, 11/2018
NXP Semiconductors
5
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