The AHV Series of DC/DC converters are designed to
replace the AHE/ATO family of converters in applica-
tions requiring compliance to MIL-STD-704A through
E, in particular the input surge requirement of 80 volts
specified to withstand transient input voltage of 80 volts.
No input voltage or output power derating is necessary
over the full military temperature range.
These converters are packaged in an extremely rug-
ged, low profile package that meets all requirements of
MIL-STD-883 and MIL-PRF-38534. Parallel seam weld
sealing and the use of ceramic pin feedthru seals as-
sure long term hermeticity after exposure to extended
temperature cycling.
The basic circuit is a push-pull forward topology using
power MOSFET switches. The nominal switching fre-
quency is 500KHz. A unique current injection circuit
assures current balancing in the power switches. All
AHV series converters use a single stage LC input filter
to attenuate input ripple current. A low power 11.5volt
series regulator provides power to an epitaxial CMOS
custom pulse width modulator integrated circuit. This
single integrated circuit provides all PWM primary cir-
cuit functions. Power is transferred from primary to sec-
ondary through a ferrite core power transformer. An
error voltage signal is generated by comparing a highly
stable reference voltage with the converter output volt-
age and drives the PWM through a unique wideband
magnetic feedback circuit. This proprietary feedback
circuit provides an extremely wide bandwidth, high gain
control loop, with high phase margin. The feedback
control loop gain is insensitive to temperature, radia-
tion, aging, and variations in manufacturing. The trans-
fer function of the feedback circuit is a function of the
feedback transformer turns ratio which cannot change
when subjected to environmental extremes.
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are available in four screen-
ing grades to satisfy a wide range of requirements.
AHV
Features
n
n
n
n
n
n
n
n
n
n
n
n
n
80 Transient Input (100 msec max.)
50 VDC Input (Continous)
16 to 40 VDC Input Range
Single, Dual and Triple Outputs
15 Watts Output Power
(No Temperature Derating)
Low Input / Output Noise
Full Military Temperature Range
Wideband PWM Control Loop
Magnetic Feedback
Low Profile Hermetic Package (0.405”)
Short Circuit and Overload Protection
Constant Switching Frequency (500KHz)
True Hermetic Package (Parallel Seam
Welded, Ceramic Pin Feedthru)
The CH grade is fully compliant to the require-
ments of MIL-PRF-38534 for class H. The HB
grade is processed and screened to the class H
requirement, but may not necessarily meet all of
the other MIL-PRF-38534 requirements, e.g., el-
ement evaluation and Periodic Inspection (P.I.)
not required. Both grades are tested to meet the
complete group “A” test specification over the full
military temperature range without output power
deration. Two grades with more limited screen-
ing are also available for use in less demanding
applications. Variations in electrical, mechanical
and screening can be accommodated. Contact
Advanced Analog for special requirements.
www.irf.com
1
11/20/02
AHV28XX Series
Specifications (Single Output Models)
T
CASE
= -55°C to +125°C, V
IN
= +28V
±
5% unless otherwise specified
ABSOLUTE MAXIMUM RATINGS
Input Voltage
-0.5V to 50VDC (continuous) 80V (100ms)
Power Output
Internally limited, 17.5W typical
Soldering
300°C for 10 seconds (1 pin at a time)
Temperature Range
Operating
-55°C to +135°C
Storage
-65°C to +135°C
Condition
-55°C
≤
T
C
≤
+125°C,
V
IN
= 28 V
DC
±5%,
C
L
=0,
unless otherwise specified
TEST
STATIC
CHARACTERISTICS
OUTPUT
Voltage
Current
Ripple Voltage
1
Power
REGULATION
Line
Load
INPUT
Current
Ripple Current
EFFICIENCY
ISOLATION
SYMBOL
Group A
Subgroups
AHV2805S
Min
Max
AHV2812S
Min
Max
AHV2815S
Min
Max
Units
V
OUT
I
OUT
V
RIP
P
OUT
VRLINE
VRLOAD
V
IN
= 16, 28, and 40 VDC
I
OUT
= 0
V
IN
= 16, 28, and 40 VDC
V
IN
= 16, 28, and 40 VDC
BW = DC to 1 MHz
V
IN
= 16, 28, and 40 VDC
V
IN
= 16, 28, and 40 VDC
I
OUT
= 0, half load and full load
VIN = 16, 28, and 40 VDC
I
OUT
= 0, half load and full load
I
OUT
= 0, Inhibit (pin 2) = 0
I
OUT
= 0, Inhibit (pin 2) = Open
I
OUT
= Full load
I
OUT
= Full Load
T
C
= +25°C
Input to output or any pin to
case (except pin 8) at 500
VDC
TC = +25°C
No effect on DC performance
TC = +25°C
Overload, TC = +25°C
4
Short Circuit, TC = +25°C
I
OUT
= Full Load
1
2,3
1,2,3
1,2,3
1,2,3
1
2,3
1,2,3
4.95
4.90
0.0
5.05
5.10
3.00
60
11.88
11.76
0.0
12.12
12.24
1.25
60
14.85
14.70
0.0
15.15
15.30
1.00
60
V
V
A
mVp-p
W
15
5
25
50
15
30
60
120
15
35
75
150
mV
mV
mV
I
IN
I
RIP
E
FF
ISO
1,2,3
1,2,3,
1
1
18
50
50
72
100
72
100
18
50
50
72
100
18
50
50
mA
mA
mAp-p
%
MΩ
Capacitive Load
2,3
Load Fault
Power Dissipation
Switching Frequency
C
L
P
D
4
500
200
200
µF
W
W
KHz
1
8.5
8.5
450
550
450
8,5
8.5
550
450
8.5
8.5
550
F
S
DYNAMIC
CHARACTERISTICS
Step Load Changes
Output Transient
5
Recovery
5,6
4
VOT
LOAD
TT
LOAD
50% Load
135
100% Load
No Load
135
50%
50% Load
135
100%
No Load
335
50% Load
50% Load
335
No lLoad
Input step 16 to 40 VDC
3,7
Input step 40 to 16 VDC
3,7
Input step 16 to 40 VDC
3,6,7
Input step 40 to 16 VDC
3,6,7
I
OUT
= OA and Full Load
I
OUT
= O and Full Load
8
V
IN
= 16 to 40 VDC
4
4
4
4
4
4
4
4
4
4,5,6
4,5,6
4,5,6
-300
-500
+300
+500
70
200
5
300
-1000
800
800
550
10
10
-300
-750
+300
+750
70
1500
5
500
-1500
800
800
750
10
10
-300
-750
+300
+750
70
1500
5
500
-1500
800
800
750
10
10
mVpk
mVpk
µs
µs
ms
mVpk
mVpk
µs
µs
mVpk
ms
ms
Step Line Changes
Output Transient
Recovery
TURN-ON
Overshoot
Delay
Load Fault Recovery
VOT
LINE
TT
LINE
VTon
os
T on D
TR
LF
Notes to Specifications (Single Output Models)
1. Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz.
2. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb
loop stability but will interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on.
3. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter shall be guaranteed to the limits specified.
4. An overload is that condition with a load in excess of the rated load but less than necessary to trigger the short circuit protection and is the condition of maximum
power dissipation.
5. Load step transition time between 2 to 10 microseconds.
6. Recovery time is measured from the initiation of the transient to where V
OUT
has returned to within
±1
percent of V
OUT
at 50 percent load.
7. Input step transition time between 2 and 10 microseconds.
8. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhinbit pin (pin 2) while power is
applied to the input. Above 125°C case temperature, derate output power linearly to 0 at 135°C case.
2
www.irf.com
AHV28XX Series
Specifications (Dual Output Models)
T
CASE
= -55°C to +125°C, V
IN
= +28V
±
5% unless otherwise specified
ABSOLUTE MAXIMUM RATINGS
Input Voltage
-0.5V to 50VDC (continuous) 80V (100ms)
Power Output
Internally limited, 17.5W typical
Soldering
300°C for 10 seconds (1 pin at a time)
Temperature Range
Operating
-55°C to +135°C
Storage
-65°C to +135°C
Condition
-55°C
≤
T
C
≤
+125°C,
V
IN
= 28 V
DC
±5%,
C
L
=0,
unless otherwise specified
TEST
STATIC
CHARACTERISTICS
OUTPUT
1
Voltage
Current
1,3
Ripple Voltage
Power
REGULATION
1,5
Line
Load
1
1,2,4
1,2
SYMBOL
Group A
Subgroups
AHV2812D
Min
Max
AHV2815D
Min
Max
Units
V
OUT
I
OUT
V
RIP
P
OUT
VR
LINE
I
OUT
VR
LOAD
I
IN
I
OUT
= 0
V
IN
= 16, 28, and 40 VDC
V
IN
= 16, 28, and 40 VDC
BW = DC to 2 MHz
V
IN
= 16, 28, and 40 VDC
V
IN
= 16, 28, and 40 VDC
I
OUT
= 0, half load and full load
VIN = 16, 28, and 40 VDC
I
OUT
= 0, half load and full load
I
OUT
= 0, Inhibit (pin 2)
Tied to input return (pin 10)
I
OUT
= 0, Inhibit (pin 2) = Open
I
OUT
= Full load
BW = DC to 2MHz
I
OUT
= Full Load
T
C
= +25°C
Input to output or any pin to
case (except pin 8) at 500 VDC,
TC = +25°C
No effect on DC performance
TC = +25°C
Overload, TC = +25°C
Short Circuit, TC = +25°C
I
OUT
= Full Load
8
1
2,3
1,2,3
1,2,3
1,2,3
1
2,3
1,2,3
±11.88
±11.76
0.0
±12.12
±12.24
±625
60
±14.85
±14.70
0.0
±15.15
±15.30
±500
60
V
V
mA
mVp-p
W
15
30
60
120
15
35
75
150
mV
mV
mV
INPUT
Current
3
1,2,3
18
65
50
72
100
72
100
18
65
50
mA
mA
mAp-p
%
MΩ
µF
Ripple Current
EFFICIENCY
ISOLATION
I
RIP
E
FF
ISO
1,2,3,
1
1
Capacitive Load
6,7
C
L
4
200
200
Load Fault
Power Dissipation
Switching Frequency
P
D
1
8,5
8.5
450
550
450
8.5
8.5
550
W
W
KHz
F
S
DYNAMIC
CHARACTERISTICS
Step Load Changes
9
Output Transient
Recovery
9,10
4
VOT
LOAD
TT
LOAD
50% Load
135
100% Load
No Load
135
50%
50% Load
135
100%
No Load
335
50% Load
50% Load
335
No lLoad
Input step 16 to 40 VDC
Input step 40 to 16 VDC
Input step 16 to 40 VDC
Input step 40 to 16 VDC
I
OUT
= O and Full Load
I
OUT
= O and Full Load
4
4
4
4
4
4
4
4
4
4,5,6
4,5,6
4,5,6
-300
-500
+300
+500
70
1500
5
1200
-1500
4
4
600
10
10
-300
-500
+300
+500
70
1500
5
1500
-1500
4
4
600
10
10
mVpk
mVpk
µS
µS
ms
mVpk
mVpk
µs
µs
mVpk
ms
ms
Step Line Changes
7,11
Output Transient
Recovery
7,10, 11
VOT
LINE
TT
LINE
TURN-ON
1
Overshoot
1,12
Delay
Load Fault Recovery
7
VTon
OS
T on D
TR
LF
For Notes to Specifications, refer to page 5
www.irf.com
3
AHV28XX Series
Specifications (Triple Output Models)
T
CASE
= -55°C to +125°C, V
IN
= +28V
±
5% unless otherwise specified
ABSOLUTE MAXIMUM RATINGS
Input Voltage
-0.5V to 50VDC (continuous) 80V (100ms)
Power Output
Internally limited, 17.5W typical
Soldering
300°C for 10 seconds (1 pin at a time)
Temperature Range
Operating
-55°C to +135°C
Storage
-65°C to +135°C
Condition
-55°C
≤
T
C
≤
+125°C,
V
IN
= 28 V
DC
±5%,
C
L
=0,
unless otherwise specified
TEST
STATIC
CHARACTERISTICS
OUTPUT
1
Voltage
SYMBOL
Group A
Subgroups
AHV2812T
Min
Max
AHV2815T
Min
Max
Units
V
OUT
I
OUT
= 0 (main)
I
OUT
= 0 (dual)
1
Current
1,2,3
I
OUT
1,4
Ripple Voltage
V
RIP
Power
1,2,3
P
OUT
V
IN
= 16, 28, and 40 VDC (main)
1
V
IN
= 16, 28, and 40 VDC (dual)
V
IN
= 16, 28, and 40 VDC
BW = DC to 2 MHz (main)
V
IN
= 16, 28, and 40 VDC
BW = DC to 2 MHz (main)
V
IN
= 16, 28, and 40 VDC (main)
(+dual)
(-dual)
(total)
V
IN
= 16, 28, and 40 VDC
I
OUT
= 0, 50%, and 100% load (main)
I
OUT
= 0, 50%, and 100% load (dual)
V
IN
= 16, 28, and 40 VDC
I
OUT
= 0, 50%, and 100% load (main)
I
OUT
= 0, 50%, and 100% load (dual)
I
OUT
= 0, Inhibit (pin 8)
Tied to input return (pin 10)
I
OUT
= 0
Inhibit (pin 2) = open
I
OUT
= 2000 mA (main)
I
OUT
=
±208mA
(±12V)
I
OUT
=
±167mA
(±15V)
BW = DC to 2MHz
I
OUT
= 2000mA (main)
I
OUT
=
±208mA
(±12V)
I
OUT
=
±167mA
(±15V)
Input to output or any pin to
case (except pin 7) at 500 VDC,
TC = +25°C
No effect on DC performance
TC = +25°C (main)
(dual)
Overload, TC = +25°C
Short Circuit, TC = +25°C
I
OUT
= 2000mA (main)
I
OUT
=
±208mA
(±12V)
I
OUT
=
±167mA
(±15V)
5
1
2,3
1
2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
4.95
4.90
±11.88
±11.76
0.0
0.0
5.05
5.10
±12.12
±12.24
2000
±208
80
40
4.95
4.90
±14.85
±14.70
0.0
0.0
5.05
5.10
±15.15
±15.30
2000
±167
80
40
V
V
V
V
mA
mA
mVp-p
mVp-p
W
W
W
W
10
2.5
2.5
15
10
2.5
2.5
15
REGULATION
1,3
Line
1,3
VR
LINE
VR
LOAD
1,2,3
25
±60
50
±60
25
±75
50
±75
15
50
50
mV
mV
mV
mV
Load
INPUT
Current
I
IN
1,2,3
1,2,3
1,2,3
15
50
50
mA
mA
mAp-p
Ripple Current
4
I
RIP
EFFICIENCY
E
FF
1
72
72
%
ISOLATION
ISO
1
100
100
MΩ
Capacitive Load
6,7
C
L
4
500
200
8.5
8.5
450
550
450
500
200
8.5
8.5
550
µF
µF
W
W
KHz
Load Fault
3
Power Dissipation
Switching Frequency
1
P
D
1
1
4
F
S
For Notes to Specifications, refer to page 5
4
www.irf.com
AHV28XX Series
Specifications (Triple Output Models) - continued
Condition
-55°C
≤
T
C
≤
+125°C,
V
IN
= 28 V
DC
±
5%, C
L
=0,
unless otherwise specified
Group A
Subgroups
AHV2812T
Min
Max
AHV2815T
Min
Max
Units
TEST
DYNAMIC
CHARACTERISTICS
Step Load Changes
9
Output Transient
Recovery
9,10
SYMBOL
VOT
LOAD
TT
LOAD
50% Load
135
100% Load
No Load
135
50%
50% Load
135
100%
No Load
335
50% Load
50% Load
335
No lLoad
Input step 16 to 40 VDC
Input step 40 to 16 VDC
Input step 16 to 40 VDC
Input step 40 to 16 VDC
I
OUT
= O and
±625mA
I
OUT
= O and
±625mA
4
4
4
4
4
4
4
4
4
4
4
4
-300
-400
+300
+400
100
2000
5
1200
-1500
4
4
750
15
15
-300
-400
+300
+400
100
2000
5
1200
-1500
4
4
750
15
15
mVpk
mVpk
µS
µS
ms
mVpk
mVpk
µs
µs
mVpk
ms
ms
Step Line Changes
Output Transient
Recovery
7,10, 11
VOT
LINE
TT
LINE
TURN-ON
1
Overshoot
1,12
Delay
7
Load Fault Recovery
VTon
OS
T on D
TR
LF
Notes to Specifications (Triple Output Models)
Tested at each output.
Parameter guaranteed by line and load regulation tests.
At least 25 percent of the total power should be taken from the (+5 volt) main output.
Bandwidth guaranteed by design. Tested for 20KHz to 2MHz.
An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit
protection and is the condition of maximum power dissipation.
6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the
maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a
short circuit during turn-on.
7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be
guaranteed to the limits specified.
8. Above 125°C case temperature, derate output power linearly to 0 at 135°C case.
9. Load step transition time between 2 and 10 microseconds.
10. Recovery time is measured from the initiation of the transient to where V
OUT
has returned to within
±1
percent of V
OUT
at 50 percent
load.
11. Input step transition time between 2 and 10 microseconds.
12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit
pin (pin 8) while power is applied to the input.
1.
2.
3.
4.
5.
Notes to Specifications (Dual Output Models)
1.
2.
3.
4.
5.
6.
Tested at each output.
Parameter guaranteed by line and load regulation tests.
Bandwidth guaranteed by design. Tested for 20KHz to 2MHz.
Total power at both outputs.
When operating with unbalanced loads, at least 25% of the load must be on the positive output to maintain regulation.
Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the
maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a
short circuit during turn-on.
Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be
guaranteed to the limits specified.
An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit
protection and is the condition of maximum power dissipation.
Load step transition time between 2 and 10 microseconds.
Recovery time is measured from the initiation of the transient to where V
OUT
has returned to within
±1
percent of V
OUT
at 50 percent
load.
Input step transition time between 2 and 10 microseconds.
Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit
pin (pin 2) while power is applied to the input.
Above 125°C case temperature, derate output power linearly to 0 at 135°C.
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