Integrated Device Technology, Inc.
FAST CMOS DUAL
1-OF-4 DECODER
WITH ENABLE
DESCRIPTION:
IDT54/74FCT139T/AT/CT
FEATURES:
•
•
•
•
Std., A and C speed grades
Low input and output leakage
≤1µA
(max.)
CMOS power levels
True TTL input and output compatibility
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, QSOP, CERPACK and
LCC packages
•
•
•
•
•
The IDT54/74FCT139T/AT/CT are dual 1-of-4 decoders
built using an advanced dual metal CMOS technology. These
devices have two independent decoders, each of which
accept two binary weighted inputs (A
0
-A
1
) and provide four
mutually exclusive active LOW outputs (
O
0
-
O
3
). Each de-
coder has an active LOW enable (
E
). When
E
is HIGH, all
outputs are forced HIGH.
FUNCTIONAL BLOCK DIAGRAM
E
a
A
0a
A
1a
E
b
A
0b
A
1b
PIN CONFIGURATIONS
E
a
A
0a
A
1a
O
0a
O
1a
O
2a
O
3a
GND
1
2
3
4
5
6
7
8
P16-1
D16-1
SO16-1
SO16-7
&
E16-1
16
15
14
13
12
11
10
9
V
CC
E
b
A
0b
A
1b
O
0b
O
1b
O
2b
O
3b
2566 drw 02
DIP/SOIC/QSOP/CERPACK
TOP VIEW
E
a
V
CC
A
0a
NC
1
INDEX
O
0a
O
1a
O
2a
O
3a
O
0b
O
1b
O
2b
O
3b
2566 drw 01
3 2
A
1a
O
0a
NC
O
1a
O
2a
4
5
6
7
8
20 19
18
17
16
15
14
E
b
A
0b
A
1b
NC
O
0b
O
1b
L20-2
9 10 11 12 13
GND
NC
O
3b
O
3a
O
2b
2566 drw 03
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1995
Integrated Device Technology, Inc.
APRIL 1995
DSC-4218/3
6.4
1
IDT54/74FCT139T/AT/CT
FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Commercial
V
TERM(2)
Terminal Voltage
–0.5 to +7.0
with Respect to
GND
(3)
Terminal Voltage
V
TERM
–0.5 to
with Respect to
V
CC
+0.5
GND
T
A
Operating
0 to +70
Temperature
T
BIAS
Temperature
–55 to +125
Under Bias
T
STG
Storage
–55 to +125
Temperature
P
T
Power Dissipation
0.5
I
OUT
DC Output
Current
–60 to +120
Military
–0.5 to +7.0
Unit
V
PIN DESCRIPTION
Pin Names
A
0
, A
1
Description
Address Inputs
Enable Input (Active LOW)
Outputs (Active LOW)
2566 tbl 01
–0.5 to
V
CC
+0.5
–55 to +125
–65 to +135
–65 to +150
0.5
–60 to +120
V
°C
°C
°C
W
mA
E
O
0
-
O
3
FUNCTION TABLE
(1)
E
H
L
L
L
L
Inputs
A
0
X
L
H
L
H
Outputs
A
1
X
L
L
H
H
O
0
H
L
H
H
H
O
1
H
H
L
H
H
O
2
H
H
H
L
H
O
3
H
H
H
H
L
2566 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
V
CC
by +0.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
NOTE:
2566 tbl 02
1. H = HIGH Voltage Level
;
L = LOW Voltage Level; X = Don’t Care
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
Parameter
(1)
C
IN
Input
Capacitance
C
OUT
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max. Unit
10
pF
12
pF
2566 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
I H
I
I L
I
I
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
Input HIGH Current
(4)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –6mA MIL.
I
OH
= –8mA COM'L.
I
OH
= –12mA MIL.
I
OH
= –15mA COM'L.
I
OL
= 32mA MIL.
I
OL
= 48mA COM'L.
—
V
I
= 2.7V
V
I
= 0.5V
Min.
2.0
—
—
—
—
—
–60
2.4
2.0
—
—
—
Typ.
(2)
—
—
—
—
—
–0.7
–120
3.3
3.0
0.3
200
0.01
Max.
—
0.8
±1
±1
±1
–1.2
–225
—
—
0.5
—
1
Unit
V
V
µA
µA
µA
V
mA
V
V
V
mV
mA
2566 tbl 05
V
CC
= Max., V
I
= V
CC
(Max.)
V
OL
V
H
I
CC
Output LOW Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Max.
V
IN
=
GND or
V
CC
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is
±5µA
at T
A
= –55°C.
6.4
2
IDT54/74FCT139T/AT/CT
FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
One Bit Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
o
= 10MHz
50% Duty Cycle
One Input and
One Output Toggling
V
CC
= Max.
Outputs Open
f
o
= 10MHz
50% Duty Cycle
One Input Toggling
on Each Decoder
Two Outputs Toggling
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2.0
0.3
Unit
mA
mA/
MHz
V
IN
= V
CC
V
IN
= GND
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
1.5
4.0
mA
—
1.8
5.0
—
3.0
7.0
(5)
—
3.5
9.0
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
2566 tbl 06
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT139T
Com'l.
Parameter
Description
Condition
(1)
Mil.
FCT139AT
Com'l.
Mil.
FCT139CT
Com'l.
Mil.
Unit
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max.
t
PLH
t
PHL
t
PLH
t
PHL
Propagation Delay
A
0
or A
1
to
O
n
Propagation Delay
E
to
O
n
C
L
= 50pF
R
L
= 500Ω
1.5
1.5
9.0
8.0
1.5 12.0
1.5
9.0
1.5
1.5
5.9
5.5
1.5
1.5
7.8
7.2
1.5
1.5
5.0
4.8
1.5
1.5
6.2
5.8
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
2566 tbl 07
6.4
3
IDT54/74FCT139T/AT/CT
FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500
Ω
V
IN
Pulse
Generator
R
T
D.U.T.
50pF
C
L
2566 drw 04
SWITCH POSITION
Test
7.0V
Switch
Open Drain
Disable Low
Enable Low
All Other Tests
Closed
Open
V
OUT
500
Ω
2566 lnk 08
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
SU
t
H
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
2566 drw 05
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
1.5V
t
REM
1.5V
2566 drw 06
t
SU
t
H
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
1.5V
0V
3.5V
0.3V
t
PHZ
0.3V
1.5V
0V
V
OH
0V
2566 drw 08
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
2566 drw 07
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
3.5V
1.5V
t
PLZ
V
OL
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
6.4
4
IDT54/74FCT139T/AT/CT
FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
Temp. Range
FCT
X
Family
XXXX
Device Type
X
Package
X
Process
Blank
B
P
D
SO
L
E
Q
139T
139AT
139CT
Blank
54
74
Commercial
MIL-STD-883, Class B
Plastic DIP
CERDIP
Small Outline IC
Leadless Chip Carrier
CERPACK
Quarter-size Small Outline Package
Dual 1-of-4 Decoder
High Drive
–55°C to +125°C
0°C to +70°C
2566 drw 09
6.4
5
综合技术交流
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
