IDT54/74FCT139/A/C
FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE
®
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS DUAL
1-OF-4 DECODER
WITH ENABLE
DESCRIPTION:
IDT54/74FCT139
IDT54/74FCT139A
IDT54/74FCT139C
Integrated Device Technology, Inc.
FEATURES:
•
•
•
•
•
•
•
•
•
•
•
•
IDT54/74FCT139 equivalent to FAST™ speed
IDT54/74FCT139A 35% faster than FAST
IDT54/74FCT139C 45% faster than FAST
Equivalent to FAST output drive over full temperature
and voltage supply extremes
I
OL
= 48mA (commercial) and 32mA (military)
CMOS power levels (1mW typ. static)
TTL input and output level compatible
CMOS output level compatible
Substantially lower input current levels than FAST
(5µA max.)
JEDEC standard pinout for DIP and LCC
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
The IDT54/74FCT139/A/C are dual 1-of-4 decoders built
using an advanced dual metal CMOS technology. These
devices have two independent decoders, each of which
accept two binary weighted inputs (A
0
-A
1
) and provide four
mutually exclusive active LOW outputs (
O
0
-
O
3
). Each de-
coder has an active LOW enable (
E
). When
E
is HIGH, all
outputs are forced HIGH.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
E
a
1
2
3
4
5
6
7
8
16
15
P16-1
D16-1 14
SO16-1 13
&
12
E16-1
11
10
9
V
CC
E
b
A
0b
A
1b
O
0b
O
1b
O
2b
O
3b
E
a
A
0a
A
1a
E
b
A
0b
A
1b
A
0a
A
1a
O
0a
O
1a
O
2a
O
3a
GND
DIP/SOIC/CERPACK
TOP VIEW
2605 cnv* 01
O
0a
O
1a
O
2a
O
3a
O
0b
O
1b
O
2b
O
3b
2605 cnv* 03
3
A
1a
O
0a
NC
O
1a
O
2a
4
5
6
7
8
2
1
20 19
18
17
16
15
14
V
CC
E
b
A
0a
E
a
NC
INDEX
A
0b
A
1b
NC
O
0b
O
1b
L20-2
9 10 11 12 13
GND
NC
O
3a
O
3b
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
O
2b
2605 cnv* 02
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992
Integrated Device Technology, Inc.
MAY 1992
DSC 4613/3
7.4
7.4
1
1
IDT54/74FCT139/A/C
FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TRUTH TABLE
(1)
E
H
L
L
L
L
Inputs
A
0
X
L
H
L
H
Outputs
A
1
X
L
L
H
H
PIN DESCRIPTION
O
0
H
L
H
H
H
O
1
H
H
L
H
H
O
2
H
H
H
L
H
O
3
H
Pin Names
A
0
, A
1
Description
Address Inputs
Enable Input (Active LOW)
Outputs (Active LOW)
2605 tbl 04
H
H
H
L
2605 tbl 05
E
O
0
-
O
3
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
V
TERM(2)
Terminal Voltage
with Respect to
GND
V
TERM(3)
Terminal Voltage
with Respect to
GND
T
A
Operating
Temperature
T
BIAS
Temperature
Under Bias
T
STG
Storage
Temperature
P
T
Power
Dissipation
I
OUT
DC Output
Current
Commercial
–0.5 to +7.0
Military
–0.5 to +7.0
Unit
V
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
Parameter
(1)
C
IN
Input
Capacitance
C
OUT
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
02
–0.5 to V
CC
–0.5 to V
CC
V
0 to +70
–55 to +125
–55 to +125
0.5
120
–55 to +125
–65 to +135
–65 to +150
0.5
120
°
C
°
C
°
C
W
mA
NOTE:
2605 tbl
1. This parameter is measured at characterization but not tested.
NOTES:
2605 tbl 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating con-
ditions for extended periods may affect reliability. No terminal voltage may
exceed V
CC
by +0.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
7.4
2
IDT54/74FCT139/A/C
FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
I H
I
I L
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
Input LOW Current
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32
µ
A
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
I
OH
= –300
µ
A
I
OH
= –12mA MIL.
I
OH
= –15mA COM'L.
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300
µ
A
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 300
µ
A
I
OL
= 32mA MIL.
I
OL
= 48mA COM'L.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
Min.
2.0
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.5
0.5
2605 tbl 03
Unit
V
V
µ
A
V
mA
V
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
7.4
3
IDT54/74FCT139/A/C
FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
One Bit Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fo = 10MHz
50% Duty Cycle
One Output Toggling
V
CC
= Max.
Outputs Open
fo = 10MHz
50% Duty Cycle
One Output Toggling
on Each Decoder
Min.
—
—
V
IN
≥
V
HC
V
IN
≤
V
LC
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2.0
0.3
Unit
mA
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4.5
mA
—
2.0
5.5
—
3.2
7.5
(5)
—
3.7
9.5
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
o
N
O
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
o
= Output Frequency
N
O
= Number of Outputs at f
o
All currents are in milliamps and all frequencies are in megahertz.
2605 tbl 04
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT139
Com'l.
Parameter
Description
Condition
(1)
Mil.
IDT54/74FCT139A
Com'l.
Mil.
IDT54/74FCT139C
Com'l.
Mil.
Unit
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max.
t
PLH
t
PHL
t
PLH
t
PHL
Propagation Delay
A
0
or A
1
to
O
n
Propagation Delay
E
to
O
n
C
L
= 50pF
R
L
= 500Ω
1.5
1.5
9.0
8.0
1.5 12.0
1.5
9.0
1.5
1.5
5.9
5.5
1.5
1.5
7.8
7.2
1.5
1.5
5.0
4.8
1.5
1.5
6.2
5.8
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
2605 tbl 07
7.4
4
IDT54/74FCT139/A/C
FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500Ω
V
IN
Pulse
Generator
R
T
D.U.T.
50pF
C
L
500Ω
V
OUT
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
DEFINITIONS:
2605 tbl 08
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
t
SU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
REM
3V
1.5V
0V
3V
1.5V
0V
t
H
3V
1.5V
0V
3V
1.5V
0V
PULSE WIDTH
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
1.5V
1.5V
t
SU
t
H
PROPAGATION DELAY
3V
1.5V
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
3V
1.5V
0V
t
PHL
0V
V
OH
1.5V
V
OL
ENABLE AND DISABLE TIMES
ENABLE
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY SWITCH
LOW CLOSED
t
PZH
OUTPUT SWITCH
NORMALLY OPEN
HIGH
3.5V
1.5V
0.3V
t
PHZ
0.3V
1.5V
0V
V
OH
0V
t
PLZ
DISABLE
3V
1.5V
0V
3.5V
V
OL
SAME PHASE
INPUT TRANSITION
NOTES
2605 drw 10
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0 MHz; Z
O
≤
50Ω; t
F
≤
2.5ns;
t
R
≤
2.5ns.
7.4
5
电子竞赛
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
