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The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
74HC/HCT4066
Quad bilateral switches
Product specification
Supersedes data of 1998 Oct 02
File under Integrated Circuits, IC06
1998 Nov 10
Philips Semiconductors
Product specification
Quad bilateral switches
FEATURES
•
Very low “ON” resistance:
50
Ω
(typ.) at V
CC
= 4.5 V
45
Ω
(typ.) at V
CC
= 6.0 V
35
Ω
(typ.) at V
CC
= 9.0 V
•
Output capability: non-standard
•
I
CC
category: SSI.
GENERAL DESCRIPTION
The 74HC/HCT4066 are high-speed Si-gate CMOS
devices and are pin compatible with the “4066” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
74HC/HCT4066
The 74HC/HCT4066 have four independent analog
switches. Each switch has two input/output terminals (nY,
nZ) and an active HIGH enable input (nE). When nE is
LOW the belonging analog switch is turned off.
The “4066” is pin compatible with the “4016” but exhibits a
much lower “ON” resistance. In addition, the “ON”
resistance is relatively constant over the full input signal
range.
TYPICAL
SYMBOL
t
PZH
/ t
PZL
t
PHZ
/ t
PLZ
C
I
C
PD
C
S
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
a) P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
{(C
L
+
C
S
) ×
V
CC2
×
f
o
} where:
b) f
i
= input frequency in MHz
c) f
o
= output frequency in MHz
d)
∑
{(C
L
+
C
S
) ×
V
CC2
×
f
o
} = sum of outputs
e) C
L
= output load capacitance in pF
f) C
S
= maximum switch capacitance in pF
g) V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
PARAMETER
turn-on time nE to V
os
turn-off time nE to V
os
input capacitance
power dissipation capacitance per switch
max. switch capacitance
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; R
L
= 1 kΩ; V
CC
= 5 V
11
13
3.5
11
8
HCT
12
16
3.5
12
8
ns
ns
pF
pF
pF
UNIT
1998 Nov 10
2
Philips Semiconductors
Product specification
Quad bilateral switches
ORDERING INFORMATION
TYPE
NUMBER
74HC4066
74HC4066
74HC4066
74HC4066
74HCT4066
74HCT4066
74HCT4066
74HCT4066
PACKAGE
NAME
DIP14
SO14
SSOP14
TSSOP14
DIP14
SO14
SSOP14
TSSOP14
DESCRIPTION
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads; body width 3.9 mm
74HC/HCT4066
VERSION
SOT27-1
SOT108-1
SOT337-1
SOT27-1
SOT108-1
SOT337-1
plastic shrink small outline package; 14 leads; body width 5.3 mm
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads; body width 3.9 mm
plastic shrink small outline package; 14 leads; body width 5.3 mm
plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
PIN DESCRIPTION
PIN NO.
1, 4, 8, 11
2, 3, 9, 10
7
13, 5, 6, 12
14
SYMBOL
1Y to 4Y
1Z to 4Z
GND
1E to 4E
V
CC
independent inputs/outputs
independent inputs/outputs
ground (0 V)
enable inputs (active HIGH)
positive supply voltage
NAME AND FUNCTION
handbook, halfpage
handbook, halfpage
1Y
1Z
2Z
2Y
2E
3E
GND
1
2
3
4
5
6
7
MGR253
14 VCC
13 1E
12 4E
1Y
13
1E
1Z
2Y
2Z
3Y
3Z
4Y
4Z
MGR254
1
2
4
3
8
9
11
10
5
2E
4066
11 4Y
10 4Z
9
3Z
6
3E
12
4E
8 3Y
Fig.1 Pin configuration.
Fig.2 Logic symbol.
1998 Nov 10
3
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4066
handbook, halfpage
1
13 #
4
5 #
8
6 #
11
12 #
2
handbook, halfpage
1
13 #
1
X1
1
2
3
4
5 #
1
X1
1
3
9
8
10
6 #
1
X1
1
9
11
MGR255
1
X1
1
10
12 #
MGR256
a.
b.
Fig.3 IEC logic symbol.
FUNCTION TABLE
INPUT NE
L
H
Note
1. H = HIGH voltage level; L = LOW voltage level.
13
handbook, halfpage
1E
1
1Y
5
2E
4
2Y
6
3E
8
3Y
12
4E
11
4Y
handbook, halfpage
SWITCH
off
on
nY
1Z
2
2Z
3
3Z
9
4Z
10
MGR257
nE
VCC
VCC
GND
nZ
MGR258
Fig.4 Functional diagram.
Fig.5 Schematic diagram (one switch).
1998 Nov 10
4
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4066
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134) Voltages are referenced to GND
(GND = 0 V)
SYMBOL
V
CC
±I
IK
±I
SK
±I
IS
±I
CC;
±I
GND
T
stg
P
tot
PARAMETER
DC supply voltage
DC digital input diode current
DC switch diode current
DC switch current
DC V
CC
or GND current
storage temperature range
power dissipation per package
plastic DIL
plastic mini-pack (SO)
P
S
Note
1. To avoid drawing V
CC
current out of terminal nZ, when switch current flows in terminal nY, the voltage drop across
the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no V
CC
current will flow
out of terminal nY. In this case there is no limit for the voltage drop across the switch, but the voltages at nY and nZ
may not exceed V
CC
or GND.
RECOMMENDED OPERATING CONDITIONS
74HC
SYMBOL
V
CC
V
I
V
S
T
amb
T
amb
t
r
, t
f
PARAMETER
min.
DC supply voltage
DC input voltage range
DC switch voltage range
operating ambient
temperature range
operating ambient
temperature range
input rise and fall times
2.0
GND
GND
−40
−40
6.0
typ.
5.0
max.
10.0
V
CC
V
CC
+85
+125
1000
500
400
250
min.
4.5
GND
GND
−40
−40
6.0
typ.
5.0
max.
5.5
V
CC
V
CC
+85
+125
500
V
V
V
°C
°C
ns
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
CC
= 10.0 V
see DC and AC
CHARACTERISTICS
74HCT
UNIT
CONDITIONS
power dissipation per switch
750
500
100
mW
mW
mW
−65
MIN.
−0.5
MAX.
+11.0
20
20
25
50
+150
UNIT
V
mA
mA
mA
mA
°C
for temperature range:
−40
to +125
°C
74HC/HCT
above +70
°C:
derate linearly with 12 mW/K
above +70
°C:
derate linearly with 8 mW/K
for V
I
< −
0.5 V or V
I
>
V
CC
+
0.5 V
for V
S
< −
0.5 V or V
S
>
V
CC
+
0.5 V
for
−0.5
V
<
V
S
<
V
CC
+
0.5 V
CONDITIONS
1998 Nov 10
5
测试/测量
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