IDT49FCT806/A
FAST CMOS BUFFER/CLOCK DRIVER
COMMERCIAL TEMPERATURE RANGE
FAST CMOS
BUFFER/CLOCK DRIVER
IDT49FCT806/A
FEATURES:
•
•
•
•
•
•
•
•
•
•
•
0.5 MICRON CMOS Technology
Guaranteed low skew < 700ps (max.)
Low duty cycle distortion < 1ns (max.)
Low CMOS power levels
TTL compatible inputs and outputs
Rail-to-rail output voltage swing
High drive: -24mA I
OH
, +64mA I
OL
Two independent output banks with 3-state control
1:5 fanout per bank
"Heartbeat" monitor output
Available in SSOP and SOIC packages
DESCRIPTION:
The FCT806 is an inverting buffer/clock driver built using advanced dual
metal CMOS technology. Each bank consists of two banks of drivers. Each
bank drives five output buffers from a standard TTL compatible input. These
devices feature a “heart-beat” monitor for diagnostics and PLL driving. The
MON output is identical to all other outputs and complies with the output
specifications in this document.
The FCT806 offers low capacitance inputs and hysteresis. Rail-to-rail
output swing improves noise margin and allows easy interface with CMOS
inputs.
NOTE: EOL for non-green parts to occur on 5/13/10 per
PDN U-09-01
FUNCTIONAL BLOCK DIAGRAM
OE
A
5
IN
A
OA
1
-OA
5
IN
B
5
OB
1
-OB
5
OE
B
MON
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
1
c
2006
Integrated Device Technology, Inc.
SEPT. 2009
DSC-5837/3
IDT49FCT806/A
FAST CMOS BUFFER/CLOCK DRIVER
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
V
CCA
OA
1
OA
2
OA
3
GND
A
OA
4
OA
5
NC
(1)
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
1
2
3
4
5
6
7
8
9
10
SOIC/ SSOP
TOP VIEW
20
19
18
17
16
15
14
13
12
11
V
CC
OB
1
OB
2
OB
3
GND
B
OB
4
OB
5
MON
OE
B
IN
B
V
TERM(2)
V
TERM(3)
T
STG
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Input and V
CC
terminals.
3. Output and I/O terminals.
OE
A
IN
A
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
4.5
5.5
Max.
6
8
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
NOTE:
1. Pin 8 is not internally connected on devices with a "K" prefix in the date code. On older
devices, pin 8 is internally connected to GND. To insure compatibility with all products,
pin 8 should be connected to GND at the board level.
PIN DESCRIPTION
Pin Names
OE
A
,
OE
B
IN
A
, IN
B
OAn, OBn
MON
Clock Inputs
Clock Outputs
Monitor Output
Description
3-State Output Enable Inputs (Active LOW)
FUNCTION TABLE
(1)
Inputs
OE
A
,
OE
B
L
L
H
H
NOTE:
1. H = HIGH
L = LOW
Z = High-Impedance
Outputs
IN
A
, IN
B
L
H
L
H
OAn, OBn
H
L
Z
Z
MON
H
L
H
L
2
IDT49FCT806/A
FAST CMOS BUFFER/CLOCK DRIVER
COMMERCIAL TEMPERATURE RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5V ± 5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OS
V
OH
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
= GND
(3)
V
CC
= 3V, V
IN
= V
LC
or V
HC
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 3V, V
IN
= V
LC
or V
HC
V
OL
V
H
I
CC
NOTES:
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
Input LOW Current
Off State (Hi-Z) Output Current
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.
V
I
= V
CC
V
I
= GND
V
O
= V
CC
V
O
= GND
Min.
2
—
—
—
—
—
—
–60
I
OH
= –32µA
I
OH
= –300µA
I
OH
= –15mA
I
OH
= –24mA
I
OL
= 300µA
I
OL
= 300mA
I
OL
= 64mA
Output LOW Voltage
Input Hysteresis for all inputs
Quiescent Power Supply Current
V
CC
= Min.
V
IN
= V
IH
or V
IL
—
V
CC
= Max., V
IN
= GND or V
CC
V
HC
V
HC
3.6
2.4
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
3.8
GND
GND
0.3
200
5
Max.
—
0.8
±1
±1
±1
±1
–1.2
—
—
—
—
—
V
LC
V
LC
0.55
—
500
mV
µA
V
V
V
mA
Unit
V
V
µA
µA
µA
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
3
IDT49FCT806/A
FAST CMOS BUFFER/CLOCK DRIVER
COMMERCIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
A
=
OE
B
= GND
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.
Outputs Open
f
O
= 10MHz
50% Duty Cycle
OE
A
=
OE
B
= V
CC
Mon. Output Toggling
V
CC
= Max.
Outputs Open
f
O
= 2.5MHz
50% Duty Cycle
OE
A
=
OE
B
= GND
Eleven Outputs Toggling
NOTES:
1.
2.
3.
4.
5.
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at V
CC
= 5V, +25°C ambient.
Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
Values for these conditions are examples of the I
C
formula. These limits are guaranteed but not tested.
6.
I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input (V
I
N
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
Test Conditions
(1)
Min.
—
Typ.
(2)
1
0.15
Max.
2.5
0.2
Unit
mA
mA/MHz
V
IN
= V
CC
V
IN
= GND
—
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
1.5
2.5
—
2
3.8
—
4.1
6
(5)
mA
—
5.1
8.5
(5)
4
IDT49FCT806/A
FAST CMOS BUFFER/CLOCK DRIVER
COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(1)
FCT806
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(PP)
Parameter
Propagation Delay
IN
A
to
OAn,
IN
B
to
OBn
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Part-to-part skew: skew between outputs of different
packages at same power supply voltage,
t
PZL
t
PZH
t
PLZ
t
PHZ
temperature, package type and speed grade
Output Enable Time
OE
A
to
OAn, OE
B
to
OBn
Output Disable Time
OE
A
to
OAn, OE
B
to
OBn
1.5
1.5
8
7
1.5
1.5
8
7
ns
ns
Conditions
(2)
C
L
= 50pF
R
L
= 500Ω
Min
.
1.5
—
—
—
—
—
Max
.
5.6
1.5
1.5
0.7
1
1.5
Min
.
1.5
—
—
—
—
—
FCT806A
Max
.
5.3
1.5
1.5
0.7
1
1.5
Unit
ns
ns
ns
ns
ns
ns
NOTES:
1. Propagation delay range indicated by Min. and Max. limit is due to V
CC
, operating temperature and process parameters. These propagation delay limits do not imply skew.
2. See test circuits and waveforms.
5
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