Freescale Semiconductor
Addendum
Document Number: QFN_Addendum
Rev. 0, 07/2014
Addendum for New QFN
Package Migration
This addendum provides the changes to the 98A case outline numbers for products covered in this book.
Case outlines were changed because of the migration from gold wire to copper wire in some packages. See
the table below for the old (gold wire) package versus the new (copper wire) package.
To view the new drawing, go to Freescale.com and search on the new 98A package number for your
device.
For more information about QFN package use, see EB806:
Electrical Connection Recommendations for
the Exposed Pad on QFN and DFN Packages.
© Freescale Semiconductor, Inc., 2014. All rights reserved.
MC9S08AC16 Series Features
MC9S08AC16 Series Devices
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Consumer & Industrial
— MC9S08AC16
— MC9S08AC8
Automotive
— MC9S08AW16A
— MC9S08AW8A
40-MHz HCS08 CPU (central processor unit)
20-MHz internal bus frequency
HC08 instruction set with added BGND
instruction
Background debugging system
Breakpoint capability to allow single breakpoint
setting during in-circuit debugging (plus two
more breakpoints in on-chip debug module)
Debug module containing two comparators and
nine trigger modes. Eight deep FIFO for storing
change-of-flow addresses and event-only data.
Debug module supports both tag and force
breakpoints.
Support for up to 32 interrupt/reset sources
Up to 16 KB of on-chip in-circuit programmable
FLASH memory with block protection and
security options
Up to 1 KB of on-chip RAM
Clock source options include crystal, resonator,
external clock, or internally generated clock
with precision NVM trimming
Optional computer operating properly (COP)
reset with option to run from independent
internal clock source or bus clock
Low-voltage detection with reset or interrupt
Illegal opcode detection with reset
Illegal address detection with reset
Wait plus two stops
Peripherals
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ADC
— 8-channel, 10-bit analog-to-digital
converter with automatic compare function
SCI
— Two serial communications interface
modules with optional 13-bit break
SPI
— Serial peripheral interface module
IIC
— Inter-integrated circuit bus module to
operate at up to 100 kbps with maximum bus
loading; capable of higher baud rates with
reduced loading
Timers
— Three 16-bit timer/pulse-width
modulator (TPM) modules — Two 2-channel
and one 4-channel; each has selectable input
capture, output compare, and edge-aligned
PWM capability on each channel. Each timer
module may be configured for buffered,
centered PWM (CPWM) on all channels
KBI
— 7-pin keyboard interrupt module
Up to 38 general-purpose input/output (I/O)
pins
Software selectable pullups on ports when used
as inputs
Software selectable slew rate control on ports
when used as outputs
Software selectable drive strength on ports
when used as outputs
Master reset pin and power-on reset (POR)
Internal pullup on RESET, IRQ, and BKGD/MS
pins to reduce customer system cost
48-pin quad flat no-lead package (QFN)
44-pin low-profile quad flat package (LQFP)
42-pin shrink dual-in-line package (SDIP)
32-pin low-profile quad flat package (LQFP)
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8-Bit HCS08 Central Processor Unit (CPU)
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Input/Output
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Memory Options
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Clock Source Options
Package Options
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System Protection
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Power-Saving Modes
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