INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT132
Quad 2-input NAND Schmitt trigger
Product specification
File under Integrated Circuits, IC06
September 1993
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
FEATURES
•
Output capability: standard
•
I
CC
category: SSI
GENERAL DESCRIPTION
74HC/HCT132
The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of
transforming slowly changing input signals into sharply defined, jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The difference between the positive voltage
V
T+
and the negative voltage V
T−
is defined as the hysteresis voltage V
H
.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
TYPICAL
SYMBOL
t
PHL
/ t
PLH
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
PARAMETER
propagation delay nA, nB to nY
input capacitance
power dissipation capacitance per gate
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V 11
3.5
24
17
3.5
20
HCT
ns
pF
pF
UNIT
September 1993
2
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
PIN DESCRIPTION
PIN NO.
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
SYMBOL
1A to 4A
1B to 4B
1Y to 4Y
GND
V
CC
NAME AND FUNCTION
data inputs
data inputs
data outputs
ground (0 V)
positive supply voltage
74HC/HCT132
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
FUNCTION TABLE
INPUTS
nA
L
L
H
H
Notes
1. H = HIGH voltage level
L = LOW voltage level
Fig.5
Fig.4 Functional diagram.
Logic diagram
(one Schmitt trigger).
APPLICATIONS
•
Wave and pulse shapers
•
Astable multivibrators
•
Monostable multivibrators
nB
L
H
L
H
OUTPUT
nY
H
H
H
L
September 1993
3
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
DC CHARACTERISTICS FOR 74HC
74HC/HCT132
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Transfer characteristics are
given below.
Output capability: standard
I
CC
category: SSI
Transfer characteristics for 74HC
Voltages are referenced to GND (ground = 0 V)
T
amb
(°C)
74HC
SYMBOL PARAMETER
+25
min. typ.
V
T+
positive-going threshold
0.7
1.7
2.1
V
T−
negative-going threshold 0.3
0.9
1.2
V
H
hysteresis (V
T+
−
V
T−
)
0.2
0.4
0.6
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HC
SYMBOL PARAMETER
+25
min. typ.
t
PHL
/ t
PLH
propagation delay
nA, nB to nY
36
13
10
t
THL
/ t
TLH
output transition time
19
7
6
max.
125
25
21
75
15
13
−40
TO
+85
min. max.
155
31
26
95
19
16
−40
TO
+125
min.
max.
190
38
32
110
22
19
ns
ns
2.0
4.5
6.0
2.0
4.5
6.0
Fig.13
Fig.13
UNIT
V
CC
(V)
WAVEFORMS
TEST CONDITIONS
1.18
2.38
3.14
0.63
1.67
2.26
0.55
0.71
0.88
max.
1.5
3.15
4.2
1.0
2.2
3.0
1.0
1.4
1.6
−40
to
+85
min. max.
0.7
1.7
2.1
0.3
0.9
1.2
0.2
0.4
0.6
1.5
3.15
4.2
1.0
2.2
3.0
1.0
1.4
1.6
−40
to
+125
min. max.
0.7
1.7
2.1
0.3
0.9
1.2
0.2
0.4
0.6
1.5
3.15
4.2
1.0
2.2
3.0
1.0
1.4
1.6
V
V
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Figs 6 and 7
Figs 6 and 7
Figs 6 and 7
WAVEFORMS
UNIT V
CC
(V)
TEST CONDITIONS
September 1993
4
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
DC CHARACTERISTICS FOR 74HCT
74HC/HCT132
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Transfer characteristics are
given below.
Output capability: standard
I
CC
category: SSI
Notes to HCT types
The value of additional quiescent supply current (∆I
CC
) for a unit load of 1 is given in the family specifications.
To determine
∆I
CC
per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
nA, nB
UNIT LOAD COEFFICIENT
0.3
Transfer characteristics for 74HCT
Voltages are referenced to GND (ground = 0 V)
T
amb
(°C)
74HCT
SYMBOL PARAMETER
+25
min. typ.
V
T+
V
T−
V
H
positive-going threshold
1.2
1.4
negative-going threshold 0.5
0.6
hysteresis (V
T+
−
V
T−
)
0.4
0.4
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HCT
SYMBOL PARAMETER
min.
t
PHL
/ t
PLH
t
THL
/ t
TLH
propagation delay
nA, nB to nY
output transition time
+25
typ.
20
7
−40
to
+85
max. min.
33
15
max.
41
19
−40
to
+125
min.
max.
50
22
ns
ns
4.5
4.5
Fig.13
Fig.13
UNIT
V
CC
(V)
WAVEFORMS
TEST CONDITIONS
1.41
1.59
0.85
0.99
0.56
0.60
max.
1.9
2.1
1.2
1.4
−
−
−40
to
+85
min. max.
1.2
1.4
0.5
0.6
0.4
0.4
1.9
2.1
1.2
1.4
−
−
−40
to
+125
min. max.
1.2
1.4
0.5
0.6
0.4
0.4
1.9
2.1
1.2
1.4
−
−
V
V
V
4.5
5.5
4.5
5.5
4.5
5.5
Figs 6 and 7
Figs 6 and 7
Figs 6 and 7
WAVEFORMS
UNIT V
CC
(V)
TEST CONDITIONS
September 1993
5
测试/测量
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