74LVT04-Q100
3.3 V Hex inverter
Rev. 1 — 26 May 2014
Product data sheet
1. General description
The 74LVT04-Q100 is a high-performance product designed for V
CC
operation at 3.3 V.
The 74LVT04-Q100 provides six inverting buffers.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 3) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 3)
Specified from
40 C
to +85
C
TTL input and output switching levels
Latch-up protection
JESD78 class II exceeds 500 mA
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Specified from
40 C
to +85
C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74LVT04D-Q100
74LVT04DB-Q100
40 C
to +85
C
40 C
to +85
C
SO14
SSOP14
TSSOP14
Description
plastic small outline package; 14 leads; body width
3.9 mm
Version
SOT108-1
Type number
plastic shrink small outline package; 14 leads; body SOT337-1
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74LVT04PW-Q100
40 C
to +85
C
NXP Semiconductors
74LVT04-Q100
3.3 V Hex inverter
4. Functional diagram
A
Y
mna341
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram for one gate
5. Pinning information
5.1 Pinning
Fig 4.
Pin configuration SOT108-1 (SO14), SOT337-1 (SSOP14) and SOT402-1 (TSSOP14)
74LVT04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 26 May 2014
2 of 13
NXP Semiconductors
74LVT04-Q100
3.3 V Hex inverter
5.2 Pin description
Table 2.
Symbol
nA
nY
GND
V
CC
Pin description
Pin
1, 3, 5, 9, 11, 13
2, 4, 6, 8, 10, 12
7
14
Description
data input
data output
ground (0 V)
supply voltage
6. Functional description
Table 3.
Input
nA
L
H
[1]
Function table
[1]
Output
nY
H
L
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
T
stg
T
j
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input voltage
output voltage
input clamping current
output clamping current
output current
storage temperature
junction temperature
total power dissipation
Conditions
[1]
Min
0.5
0.5
0.5
50
50
-
-
65
[2]
Max
+4.6
+7.0
+7.0
-
-
64
32
+150
150
500
Unit
V
V
V
mA
mA
mA
mA
C
C
mW
output in OFF-state or HIGH-state
V
I
< 0 V
V
O
< 0 V
output in LOW-state
output in HIGH-state
[1]
-
-
T
amb
=
40
°C to +85 °C
[3]
The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability.
For SO14 packages: above 70
C
derate linearly with 8 mW/K.
For SSOP14 and TSSOP14 packages: above 60
C
derate linearly with 5.5 mW/K.
74LVT04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 26 May 2014
3 of 13
NXP Semiconductors
74LVT04-Q100
3.3 V Hex inverter
8. Recommended operating conditions
Table 5.
Symbol
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
T
amb
t/V
Recommended operating conditions
Parameter
supply voltage
input voltage
HIGH-level input voltage
LOW-level input voltage
HIGH-level output current
LOW-level output current
ambient temperature
input transition rise and fall rate
in free air
outputs enabled
Conditions
Min
2.7
0
2.0
-
-
-
40
-
Max
3.6
5.5
-
0.8
20
32
+85
10
Unit
V
V
V
V
mA
mA
C
ns/V
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IK
V
OH
input clamping voltage
Conditions
V
CC
= 2.7 V; I
IK
=
18
mA
V
CC
= 2.7 V; I
OH
=
6
mA
V
CC
= 3.0 V; I
OH
=
20
mA
V
OL
LOW-level output voltage
V
CC
= 2.7 V; I
OL
=
100 A
V
CC
= 2.7 V; I
OL
= 24 mA
V
CC
= 3.0 V; I
OL
= 32 mA
I
I
I
OFF
I
CCH
I
CCL
I
CC
input leakage current
V
CC
= 0 V or 3.6 V; V
I
= 5.5 V
V
CC
= 3.6 V; V
I
= V
CC
or GND
power-off leakage current V
CC
= 0 V; V
I
or V
O
= 0 V to 4.5 V
HIGH-level supply current V
CC
= 3.6 V; outputs HIGH;
V
I
= GND or V
CC
, I
O
= 0 V
LOW-level supply current
additional supply current
V
CC
= 3.6 V; outputs LOW;
V
I
= GND or V
CC
; I
O
= 0 V
per input pin
V
CC
= 3 V to 3.6 V;
one input at V
CC
0.6 V;
other inputs at V
CC
or GND
V
I
= 3 V or 0 V
[2]
40 C
to +85
C
Min
-
V
CC
0.2
2.4
2.0
-
-
-
-
-
-
-
-
-
Typ
[1]
-
-
-
-
-
-
-
-
-
-
-
1.5
-
-
-
-
0.2
0.5
0.5
10
±1
±100
0.02
3
0.2
Max
1.2
Unit
V
V
V
V
V
V
V
A
A
A
mA
mA
A
HIGH-level output voltage V
CC
= 2.7 V to 3.6 V; I
OH
=
100 A
C
I
[1]
[2]
input capacitance
-
3
-
pF
All typical values are at V
CC
= 3.3 V and T
amb
= 25C.
This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND.
74LVT04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 26 May 2014
4 of 13
NXP Semiconductors
74LVT04-Q100
3.3 V Hex inverter
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; for test circuit, see
Figure 6.
Symbol Parameter
t
PLH
Conditions
40 C
to +85
C
Min
LOW to HIGH propagation nA to nY; see
Figure 5
delay
V
CC
= 2.7 V
V
CC
= 3.3 V
0.3 V
t
PHL
HIGH to LOW propagation nA to nY; see
Figure 5
delay
V
CC
= 2.7 V
V
CC
= 3.3 V
0.3 V
[1]
All typical values are at V
CC
= 3.3 V and T
amb
= 25C.
Unit
Typ
[1]
-
2.6
-
2.5
Max
4.7
3.9
3.2
3.5
ns
ns
ns
ns
-
1.0
-
1.0
11. Waveforms
V
M
= 50%; V
I
= GND to V
CC
.
V
M
= 1.5 V; V
I
= GND to 2.7 V
Fig 5.
The input nA to output nY propagation delays
74LVT04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 26 May 2014
5 of 13
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