Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia.
Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use
http://www.nexperia.com
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salesaddresses@nexperia.com
(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
-
© Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via
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Thank you for your cooperation and
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Kind regards,
Team Nexperia
PMN28UN
TrenchMOS™ ultra low level FET
M3D302
Rev. 01 — 27 September 2002
Product data
1. Description
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™ technology.
Product availability:
PMN28UN in SOT457 (TSOP6).
2. Features
s
s
s
s
TrenchMOS™ technology
Very fast switching
Low threshold voltage
Surface mount package.
3. Applications
s
s
s
s
Battery powered motor control
Load switch in notebook computers
High speed switch in set top box power supplies
Driver FET in DC to DC converters.
4. Pinning information
Table 1:
Pin
1,2,5,6
3
4
Pinning - SOT457 (TSOP6), simplified outline and symbol
Description
drain (d)
gate (g)
source (s)
1
Top view
2
3
MBK092
Simplified outline
6
5
4
Symbol
d
g
s
MBB076
SOT457 (TSOP6)
Philips Semiconductors
PMN28UN
TrenchMOS™ ultra low level FET
5. Quick reference data
Table 2:
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference data
Conditions
25
°C ≤
T
j
≤
150
°C
T
sp
= 25
°C;
V
GS
= 4.5 V
T
sp
= 25
°C
V
GS
= 4.5 V; I
D
= 2 A; T
j
= 25
°C
V
GS
= 2.5 V; I
D
= 2 A; T
j
= 25
°C
V
GS
= 1.8 V; I
D
= 1.5 A; T
j
= 25
°C
Typ
-
-
-
-
28
32
39
Max
12
5.7
1.75
150
34
40
56
Unit
V
A
W
°C
mΩ
mΩ
mΩ
drain-source voltage (DC)
drain current (DC)
total power dissipation
junction temperature
drain-source on-state resistance
Symbol Parameter
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
drain-source voltage (DC)
gate-source voltage (DC)
drain current (DC)
peak drain current
total power dissipation
storage temperature
junction temperature
source (diode forward) current (DC) T
sp
= 25
°C
T
sp
= 25
°C;
V
GS
= 4.5 V;
Figure 2
and
3
T
sp
= 70
°C;
V
GS
= 4.5 V;
Figure 2
T
sp
= 25
°C;
pulsed; t
p
≤
10
µs;
Figure 3
T
sp
= 25
°C;
Figure 1
Conditions
25
°C ≤
T
j
≤
150
°C
Min
-
-
-
-
-
-
−55
−55
-
Max
12
±8
5.7
4.5
22.9
1.75
+150
+150
1.45
Unit
V
V
A
A
A
W
°C
°C
A
Source-drain diode
9397 750 10191
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 27 September 2002
2 of 12
Philips Semiconductors
PMN28UN
TrenchMOS™ ultra low level FET
03aa17
120
Pder
(%)
120
I
der
(%)
80
03aa25
80
40
40
0
0
50
100
150
Tsp (°C)
200
0
0
50
100
150
200
Tsp
(°C)
P
tot
P
der
=
----------------------
×
100%
P
°
tot
(
25 C
)
I
D
I
der
=
------------------
×
100%
-
I
°
D
(
25 C
)
Fig 1. Normalized total power dissipation as a
function of solder point temperature.
Fig 2. Normalized continuous drain current as a
function of solder point temperature.
102
ID
(A)
10
Limit RDSon = VDS / ID
tp = 10
µs
100
µs
1 ms
10 ms
1
DC
10-1
100 ms
03aj66
10-2
10-3
10-1
1
10
VDS (V)
102
T
sp
= 25
°C;
I
DM
is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 10191
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 27 September 2002
3 of 12
Philips Semiconductors
PMN28UN
TrenchMOS™ ultra low level FET
7. Thermal characteristics
Table 4:
R
th(j-sp)
Thermal characteristics
Conditions
Min Typ Max Unit
-
70
K/W
thermal resistance from junction to solder point mounted on a metal clad board;
Figure 4
-
Symbol Parameter
7.1 Transient thermal impedance
102
Zth(j-sp)
(K/W)
03aj56
δ
= 0.5
0.2
10
0.1
0.05
0.02
1
P
single pulse
tp
T
10-1
10-4
10-3
10-2
10-1
1
10
δ
=
tp
T
t
tp (s)
102
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.
9397 750 10191
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 27 September 2002
4 of 12
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