IDT74ALVCH16270
3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS 12-BIT TO
24-BIT REGISTERED BUS
EXCHANGER WITH 3-STATE
OUTPUTS AND BUS-HOLD
FEATURES:
0.5 MICRON CMOS Technology
Typical t
SK(0)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 0.635mm pitch SSOP, 0.50mm pitch TSSOP,
and 0.40mm pitch TVSOP packages
– Extended commercial range of – 40°C to + 85°C
– V
CC
= 3.3V ± 0.3V, Normal Range
– V
CC
= 2.7V to 3.6V, Extended Range
– V
CC
= 2.5V ± 0.2V
– CMOS power levels (0.4µ W typ. static)
– Rail-to-Rail output swing for increased noise margin
Drive Features for ALVCH16270:
– High Output Drivers: ±24mA
– Suitable for heavy loads
–
–
–
IDT74ALVCH16270
CMOS technology. The ALVCH16270 is used in applications in which
data must be transferred from a narrow high-speed bus to a wide lower-
frequency bus.
This device provides synchronous data exchange between the two
ports. Data is stored in the internal registers on the low-to-high transition
of the clock (CLK) input when the appropriate clock-enable (CLKEN)
inputs are low. The select (SEL) line selects 1B or 2B data for the A
outputs. For data transfer in the A-to-B direction, a two-stage pipeline is
provided in the A-to-1B path, with a single storage register in the A-to-2B
path. Proper control of the CLKENA input allows two sequential 12-bit
words to be presented synchronously as a 24-bit word on the B-port.
Data flow is controlled by the active-low output enables (OEA and OEB).
The control terminals are registered to synchronize the bus-direction
changes with CLK.
The ALVCH16270 has been designed with a
±
24mA output driver.
This driver is capable of driving a moderate to heavy load while
maintaining speed performance.
The ALVCH16270 has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
•
3.3V High Speed Systems
•
3.3V and lower voltage computing systems
DESCRIPTION:
This registered bus exchanger is built using advanced dual metal
FUNCTIONAL BLOCK DIAGRAM
CLK
29
2
CLKEN1B
27
CLKEN2B
30
CLKENA1
CLKENA2
OEB
55
C1
56
1D
SEL
28
OEA
1
1D
C1
CE
C1
1D
23
1
B
1
A1
8
0
1
CE
C1
1D
6
2
B
1
CE
C1
1D
CE
C1
1D
CE
C1
1D
1 of 12 Channels
EXTENDED COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
AUGUST 1999
DSC-4475/-
IDT74ALVCH16270
3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
OEA
CLKEN1B
2
B
3
FUNCTION TABLES
(1)
OUTPUT ENABLE
Inputs
Outputs
OEB
H
L
H
L
Ax
Z
Z
Active
Active
1
Bx,
2
Bx
1
2
3
4
5
6
7
8
9
10
11
12
13
56
55
54
53
52
51
50
49
48
47
46
45
44
OEB
CLKENA2
2
B
4
GND
2
B
2
2
B
1
GND
2
B
5
2
B
6
CLK
↑
↑
↑
↑
OEA
H
H
L
L
Z
Active
Z
Active
A-TO-B STORAGE (OEB = L AND OEA = H)
Inputs
CLKENA1
L
L
L
L
H
H
H
CLKENA2
H
H
L
L
L
L
H
CLK
↑
↑
↑
↑
↑
↑
X or
↑
Ax
L
H
L
H
L
H
X
1
B
0
Outputs
1
Bx
(2)
V
CC
A
1
A
2
A
3
GND
A
4
A
5
A
6
A
7
A
8
A
9
GND
A
10
A
11
A
12
V
CC
1
B
1
1
B
2
V
CC
2
B
7
2
B
8
2
B
9
2
Bx
2
B
0
(2)
2
B
0
(2)
1
B
0
(2)
L
(3)
H
(3)
1
B
0
(4)
1
B
0
1
B
0
(4)
(2)
L
H
L
H
2
B
0
(2)
GND
2
B
10
2
B
11
2
B
12
1
B
12
1
B
11
1
B
10
SO56-1
14 SO56-2 43
SO56-3
42
15
16
17
18
19
20
21
22
23
24
25
26
27
28
41
40
39
38
37
36
35
34
33
32
31
30
29
B-TO-A STORAGE (OEA = L AND OEB = H)
Inputs
CLKEN1B
H
X
L
L
X
X
CLKEN2B
X
H
X
X
L
L
CLK
X
X
↑
↑
↑
↑
SEL
H
L
H
H
L
L
1
Bx
2
Bx
Outputs
X
X
L
H
X
X
X
X
X
X
L
H
Ax
A
0
(2)
A
0
(2)
L
H
L
H
GND
1
B
9
1
B
8
1
B
7
V
CC
1
B
6
1
B
5
GND
1
B
3
GND
1
B
4
CLKEN2B
SEL
CLKENA1
CLK
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
-
= LOW-to-HIGH Transition
2. Output level before the indicated steady-state input conditions were
established.
3. Two CLK edges are needed to propagate data.
4. Data present at the output of the first register.
SSOP/
TSSOP/TVSOP
TOP VIEW
c 1998 Integrated Device Technology, Inc.
2
DSC-123456
IDT74ALVCH16270
3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN DESCRIPTION
Pin Names
Ax
(1:12)
1
Bx
(1:12)
2
Bx
(1:12)
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
Description
Bidirectional Data Port A. Usually connected to the CPU's Address/Data bus.
(1)
Bidirectional Data Port 1B. Usually connected to the even path or even bank of memory.
(1)
Bidirectional Data Port 2B. Usually connected to the odd path or odd bank of memory.
(1)
Clock Input
Clock Enable Input for the A-1B Register. If CLKENA1 is LOW during the rising edge of CLK, data will be
clocked into register A-1B (Active LOW).
Clock Enable Input for the A-2B Register. If CLKENA2 is LOW during the rising edge of CLK, data will be
clocked into register A-2B (Active LOW).
Clock Enable Input for the 1B-A Register. If CLKEN1B is LOW during the rising edge of CLK, data will be
clocked into register 1B-A (Active LOW).
Clock Enable Input for the 2B-A Register. If CLKEN2B is LOW during the rising edge of CLK, data will be
clocked into register 2B-A (Active LOW).
1B or 2B Port Selection. When HIGH during the rising edge of CLK, SEL enables data transfer from 1B Port
to A Port. When LOW during the rising edge of CLK, SEL enables data transfer from 2B Port to A Port.
Synchronous Output Enable for A Port (Active LOW)
Synchronous Output Enable for B Port (Active LOW)
CLK
CLKENA1
CLKENA2
CLKEN1B
CLKEN2B
SEL
OEA
OEB
NOTE:
1. These pins have “Bus-Hold.” All other pins are standard inputs, outputs, or I/Os.
ABSOLUTE MAXIMUM RATING
Symbol
V
TERM(2)
V
TERM(3)
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
Description
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
I
>
V
CC
Continuous Clamp Current, V
O
< 0
Continuous Current through
each V
CC
or GND
(1)
Unit
V
V
°C
mA
mA
mA
mA
NEW16link
CAPACITANCE
(T
A
= +25
o
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output
Capacitance
I/O Port
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
5
7
7
Max.
7
9
9
Unit
pF
pF
pF
NEW16link
Max.
– 0.5 to + 4.6
– 0.5 to
V
CC
+ 0.5
– 65 to + 150
– 50 to + 50
± 50
– 50
±100
NOTE:
1. As applicable to the device type.
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
3
IDT74ALVCH16270
3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
EXTENDED COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = – 40° C to +85° C
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
V
H
I
CCL
I
CCH
I
CCZ
∆I
CC
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Input HIGH Current
Input LOW Current
High Impedance Output Current
(3-State Output pins)
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
Quiescent Power Supply
Current Variation
V
CC
= 2.3V, I
IN
= – 18mA
V
CC
= 3.3V
V
CC
= 3.6V
V
IN
= GND or V
CC
One input at V
CC
−
0.6V,
other inputs at V
CC
or GND
Test Conditions
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
I
= V
CC
V
I
= GND
V
O
= V
CC
V
O
= GND
Min.
1.7
2
—
—
—
—
—
—
—
—
—
Typ.
(1)
—
—
—
—
—
—
—
—
– 0.7
100
0.1
Max.
—
—
0.7
0.8
±5
±5
± 10
± 10
– 1.2
—
40
µA
µA
V
mV
µA
µA
V
Unit
V
—
—
750
µA
NEW16link
NOTE:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
BUS-HOLD CHARACTERISTICS
Symbol
I
BHH
I
BHL
I
BHH
I
BHL
I
BHHO
I
BHLO
NOTES:
1. Pins with Bus-hold are identified in the pin description.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
NEW16link
Parameter
(1)
Bus-Hold Input Sustain Current
Bus-Hold Input Sustain Current
Bus-Hold Input Overdrive Current
V
CC
= 3.0V
V
CC
= 2.3V
V
CC
= 3.6V
Test Conditions
V
I
= 2.0V
V
I
= 0.8V
V
I
= 1.7V
V
I
= 0.7V
V
I
= 0 to 3.6V
Min.
– 75
75
– 45
45
—
Typ.
(2)
—
—
—
—
—
Max.
—
—
—
—
± 500
Unit
µA
µA
µA
4
IDT74ALVCH16270
3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
EXTENDED COMMERCIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
Test Conditions
(1)
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 6mA
I
OH
= – 12mA
Min.
V
CC
– 0.2
2
1.7
2.2
2.4
I
OH
= – 24mA
I
OL
= 0.1mA
I
OL
= 6mA
I
OL
= 12mA
V
CC
= 2.7V
V
CC
= 3.0V
I
OL
= 12mA
I
OL
= 24mA
2
—
—
—
—
—
Max.
—
—
—
—
—
—
0.2
0.4
0.7
0.4
0.55
NEW16link
Unit
V
V
CC
= 2.3V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
= 3.0V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate V
CC
range. T
A
= – 40°C to + 85°C.
OPERATING CHARACTERISTICS, T
A
= 25
o
C
V
CC
= 2.5V ± 0.2V
Symbol
C
PD
C
PD
Parameter
Power Dissipation Capacitance
Outputs enabled
Power Dissipation Capacitance
Outputs disabled
Test Conditions
C
L
= 0pF, f = 10Mhz
Typical
87
80.5
V
CC
= 3.3V ± 0.3V
Typical
120
118
Unit
pF
pF
5
工业自动化与控制
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
