www.fairchildsemi.com
ILC5061
Power Supply reset Monitor with 1% Precision
Features
•
•
•
•
•
•
All-CMOS design in SOT-23 or SC70 package
±1% precision in Reset Detection
Only 1µA of Iq
2mA of sink current capability
Built-in hysteresis of 5% of detection voltage
Voltage options of 2.6, 2.9, 3.1, 4.4, and 4.6V fit most
supervisory applications
• Open-Drain Reset Output
Description
All-CMOS Monitor circuits in either a 3-lead SOT-23 or
SC70 package offer the best performance in power con-
sumption and accuracy.
The ILC5061 comes in a series of ±1% accurate trip voltages
to fit most microprocessor applications. Even though its out-
put can sink 2mA, the device draws only 1µA in normal
operation.
Additionally, a built-in hysteresis of 5% of detect voltage
simplifies system design.
Applications
•
•
•
•
Microprocessor reset circuits
Memory battery back-up circuitry
Power-on reset circuits
Portable and battery powered electronics
Block Diagram
V
IN
Pin Package Configurations
Top View
V
OUT
V
OUT
1
V
OUT
1
SC-70
V
REF
V
SS
2
3
V
IN
V
SS
2
SOT-23
3
V
IN
V
SS
Rev. 2.5 1/2/03
ILC5061
PRODUCT SPECIFICATION
Absolute Maximum Ratings
Parameter
Input Voltages
Output Current
Output Voltages
Continuous Total
Power Dissipation
Operation Ambient temperature
Storage Temperature
SOT 23
Symbol
V
IN
I
OUT
V
OUT
P
d
T
opr
T
stg
Ratings
12
50
V
SS
-0.3~+V
IN
+03
150
-30~+80
-40~+125
Units
V
mA
V
mW
o
C
o
C
Electrical Characteristics
T
A
= 25°C
Parameter
Detect Fail Voltage
Hysteresis Range
Symbol
V
DF
V
HYS
V
IN
= 1.5V
V
IN
= 2.0V
Supply Current
I
SS
V
IN
= 3.0V
V
IN
= 4.0V
V
IN
= 5.0V
Operating Voltage
V
IN
V
DF
= 2.1~ 6.0V
N-ch V
DS
= 0.5V
V
IN
= 1.0V
Output Current
I
OUT
V
IN
= 2.0V
V
IN
= 3.0V
V
IN
= 4.0V
V
IN
= 5.0V
Temperature Charac-
teristics
Delay Time Release
Voltage Output Inver-
sion)
2.2
7.7
10.1
11.5
13.0
-200
+100
+200
mA
1.5
Conditions
Min
V
DF
X 0.99
V
DF
X 0.02
Type
V
DF
0.9
1.0
1.3
1.6
2.0
Max
V
DF
X 1.01
2.6
3.0
3.4
3.8
4.2
10.0
Units
V
V
V
DF
X 0.05 V
DF
X 0.08
µA
V
D
V
DF
/(
D
T
opr
* V
DF
)
-30
o
C<T
opr
<80
o
C
T
DLY
(V
DR
to V
OUT
inversion)
Ppm/
o
C
0.1
ms
Note:
1. An additional resistor between the V
IN
pin and supply voltage may cause deterioration of the characteristics due
to increasing V
DR.
2
Rev. 2.5 1/2/03
PRODUCT SPECIFICATION
ILC5061
Functional Description
The following designators 1~6 refer to the timing diagram below.
1. While the input voltage (V
IN
) is higher than the detect voltage (V
DF
), the V
OUT
output pin is at high impedance
state.
2. When the input V
IN
voltage falls lower than V
DF
, V
OUT
drops near to ground voltage
3. If the input voltage further decreases below the minimum operating voltage (V
MIN
), the V
OUT
output becomes
unstable. In this condition, if the V
OUT
pin is pulled up, V
OUT
indicates the V
IN
voltage.
4. During an increase of the input voltage from the V
SS
voltage, V
OUT
is not stable in the voltage below the V
MIN
.
Exceeding that level, the output stays at the ground level (V
SS
) between the minimum operating voltage (V
MIN
)
and the detect release voltage (V
DR
).
5. If the input voltage increases more than V
DR
, then the V
OUT
output pin is at high impedance state.
6. The difference between V
DR
and V
DF
is the hysteresis in the system.
INPUT VOLTAGE (V
IN
)
DETECT RELEASE VOLTAGE (V
DR
)
6
DETECT FAIL VOLTAGE (V
DF
)
MINIMUM OPERATING VOLTAGE (V
MIN
)
GROUND VOLTAGE (V
SS
)
OUTPUT VOLTAGE (V
OUT
)
GROUND VOLTAGE (V
SS
)
1
2
3
4
5
Rev. 2.5 1/2/03
3
ILC5061
PRODUCT SPECIFICATION
Typical Performance Characteristics
(General conditions for all curves)
Output Voltage vs Output Current
80
OUTPUT CURRENT I
OUT
(mA)
70
60
50
3.0V
40
30
20
10
0
0
1
2
3
4
OUTPUT VOLTAGE V
OUT
(V)
1.5V
0
0
0.2
0.4
0.6
0.8
OUTPUT VOLTAGE V
OUT
(V)
2.0V
2.5V
3.5V
ILC5061
V
IN
= 4.0V
OUTPUT CURRENT I
OUT
(µA)
800
Output Voltage vs Output Current
ILC5061
V
IN
= 0.8V
600
400
V
IN
= 0.7V
200
Ordering Information
I
SS
vs Input Voltage*
4.0
ILC5061
20
OUTPUT CURRENT I
OUT
(mA)
Output Current vs Input Voltage
ILC5061
V
DS
= 0.5V
25˚C
15
80˚C
T
opr
= -30˚C
3.0
I
SS
(µA)
Topr = 80˚C
2.0
25˚C
-30˚C
10
1.0
5
0
0
1
2
3
4
5
6
7
8
9
10
INPUT VOLTAGE V
IN
(V)
* A spike of 1/2 to 1µA may appear as V
IN
crosses V
DR
or V
DF
0
0
1
2
3
4
5
INPUT VOLTAGE V
IN
(V)
4
Rev. 2.5 1/2/03
PRODUCT SPECIFICATION
ILC5061
SOT-23 Package
0.021
0.015
0.055
0.047
0.098
0.083
0.120
0.105
0.040
0.031
0.079
0.071
0.0059
0.0035
0-8˚
0.004
0.001
PKG
C
L
0.010
0.005
0.76
0.76
0.95
LAND PATTERN RECOMMENDATION
Rev. 2.5 1/2/03
2.29
5
Linux开发
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
