Multi-Core MIPS64 Processors
R
OCTEON Plus CN56XX 8 to 12-Core MIPS64-Based SoCs
Product Brief
T
he OCTEON® Plus CN56XX family of Multi-core MIPS64 processors targets intelligent networking, control plane, security, and wireless
®
OVERVIEW
applications in next-generation equipment from 4Gbps to 10Gbps performance. The family includes six di erent software-compatible parts,
with eight to twelve cnMIPS64 cores on a single chip that integrate next-generation SERDES based networking I/Os along with the most
advanced security and application hardware acceleration to deliver a robust performance, power and real-estate value proposition over
alternative solutions. Industry’s rst Network Services Processors with less than 3 Watt/GHz power consumption across the 3.6 GHz to
10 GHz range.
FEATURES
Software compatible with the leading OCTEON family
•
8-12 cnMIPS Plus CPU cores (MIPS64/32 compatible)
•
Available in 600 MHz to 800 MHz versions
•
Enhanced MIPS64 integer (Release 2) instruction set
•
Dual-issue, ve-stage pipeline, optimized latencies
•
Auto instruction pre-fetching and advanced data
pre-fetching features to minimize memory stalls
High-performance coherent memory subsystem
•
2MB ECC protected 8-way set associative L2
cache with locking, partitioning features for optimal
performance
•
Integrated mainstream dual DDR2 memory controller
with ECC, up to DDR2-800, up to 144bit wide
Integrated coprocessors for application acceleration
•
Packet I/O processing, QoS, TCP Acceleration
•
Support for IPsec, SSL, SRTP, WLAN and 3G/UMB/LTE
security (includes DES, 3DES, AES-GCM, AES up to 256,
SHA1, SHA-2 up to SHA-512, RSA up to 8192, DH, KASUMI)
•
Compression/Decompression
High-density, high-bandwidth serial I/O for networking
•
16 high-speed SERDES, exibly con gured in blocks of 4
•
Flexible combinations of PCI Express x4, x8, XAUI (10GE),
SGMII (GbE/2GbE)
Comprehensive development environment with Linux,
VxWorks, FreeBSD and C/C++ support
Optimized power consumption: 10W – 30W
•
Package: 40 x 40 mm 1217 FCBGA
BENEFITS
Market-leading performance
•
Up to 21.6 Billion instructions per second
•
Over 10+ Gbps application performance
- Up to 23 Mpps 64B IP forwarding
- Up to 20+ Gbps for TCP, IPsec, SSL, KASUMI
- Up to 12Gbps for Compression/Decompression
Sophisticated hardware based QoS support
•
Queuing, scheduling
•
Very low latency for real-time tra c
Scalable per-core security coprocessor architecture for lower
latency, reduced interconnect overhead, and higher small
packet performance
Reduced BOM cost with essential interfaces
Flexible architecture allows host and coprocessor
Implementations in a single chip
Industry-standard programming model without any need for
Proprietary tools or micro-coding
Software compatible with entire OCTEON family
to deliver 1- 16 CPU scalability
Highest performance, optimized power and integration
for Networking and Wireless control plane, L4-L7 data
and security services
OCTEON
®
Plus CN56XX
- Block Diagram
Boot/flash
GPIO, MISC,
USB2.0, FE
4x
x16 Serdes
enables
combination of
PCIe (2 controllers),
XAUI, SGMII or
1000B-X interfaces
with
PCIe switching*
Other I/O
4x SGMII
or 4x 1000B-X
or XAUI
Switch
PCIe
Core
PCIe
Core
PCIe Engines
Scheduler/
Sync. Order
TCP Unit
DMA Engines
Packet
Input
I/O Bridge
Packet
Output
Compression/
Decompression
I/O Bus
Packet
Security
MIPS64 r2
Integer Core
32K Icache
16K Dcache
2K Write Buffer
Coherent, Low Latency
Interconnect
2 MB
L2 Cache
Packet
4x
8 to 12
cnMIPS64
cores
Security
MIPS64 r2
Integer Core
32K Icache
16K Dcache
2K Write Buffer
4x
4x
4x SGMII
or 4x 1000B-X
or XAUI
Hyper Access DDR2
Memory Controller
2315 N. First Street
San Jose, CA 95131
T
408-943-7100
F
408-577-1992
E
sales@cavium.com
www.cavium.com
*Interface Options
•
8 - lanes PCIe + 8 - lanes PCIe
•
8 - lanes PCIe + 4 - lanes PCIe + [4x SGMII or XAUI]
•
2x [4-lanes PCIe] + 2x [4x SGMII or XAUI]
DDR2 up to 800 MHz
1x or 2x 72-bit wide
(with ECC)
Multi-Core MIPS64 Processors
R
OCTEON Plus CN56XX 8 to 12-Core MIPS64-Based SoCs
Product Brief
OCTEON Plus CN56XX - Based System Block Diagram
OCTEON Plus Single Chip Router/Appliance
PCIe x4 or x8
®
®
OCTEON Plus Offload Server/Networking NIC
2x MiniDIMM (w/ECC)
System
DRAM
System
DRAM
72 or 144-bit
4x SGMII or
1x XAUI
WAN/LAN
4x SGMII or
1x XAUI
OCTEON
CN56XX
USB 2.0
LAN/Fabric
1x 10Gbps
4x FC
4x GE
MAC
or
PHY
XAUI
or
PCIe
or
GE
OCTEON
CN56XX
PCI Express
4-8 Lanes
APPLICATIONS
•
Next-generation integrated, standalone routers and
appliances
•
Uni ed Threat Management (UTM) appliances with
Firewall, VPN (IPsec, SSL), IDS, IPS and Anti-virus
scanning
•
Application aware/L4+ content processing and switching
•
Network acceleration cards for security, TCP,
content processing, and compression
•
Integrated management and route processor cards
•
Switch/router line card and services card control
and datapath processing
•
Wireless LAN switch/appliance security and packet
processing
•
Wireless WAN security, control and packet processing
including 3G/4G/LTE and WiMAX
SOFTWARE SUPPORT
•
Cavium SDK includes:
-
Up to 12-way SMP LINUX support
-
Cavium Simple Executive for data plane applications
-
Complete GNU tool-chain, GDB, DDD and viewzilla
for tuning
-
Optimized C libraries for security, regular expression,
de/compression processing o oad
-
Support for run-to-completion or pipelined software
models
•
Complete production quality development toolkits for IP,
IPsec, SSL, TCP, SSL-VPN available
•
Comprehensive ecosystem support
-
Popular third-party operating systems and toolchains,
including MontaVista Linux, Wind River VxWorks,
ENEA OSE, and FreeBSD
-
Broad range of third-party application software vendors
-
Broad choices of ODM appliances, ATCA, and AMC cards
•
MIPS64/32 support enables thousands of MIPS and other
C/C++ applications to be easily ported to OCTEON
OCTEON Plus CN56XX - Product Family
Performance
Device
cnMIPS
cores
Max. Available
Instructions
Per Second
14.4G
18.0G
21.6G
Option
N
S
P
Y
Y
Y
C
P
L2 Cache
Packet
Interfaces
PCI
Express
Main Memory IO
w/ECC
Package
®
CN5640
CN5645
CN5650
8
10
12
Y
Y
Y
2MB
2x
[4x SGMII or 1x XAUI]
2x
[x4 or x8 lanes]
DDR2 up to 800 MHz
1x or 2x 72-bit wide
1217 FCBGA
2315 N. First Street
San Jose, CA 95131
T
408-943-7100
F
408-577-1992
E
sales@cavium.com
www.cavium.com
Device Options:
Device Speed Grade (600LP = 600 MHz Low Power, 600 = 600 MHz, 750 = 750 MHz, 800 = 800 MHz)
Option code for device family listed below:
CP = Communications Processor: Includes networking, TCP acceleration and QoS
NSP = Network Services Processor: Includes, encryption, de/compression, networking, TCP acceleration and QoS
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All other brands and product names are registered trademarks of their respective owners.
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