HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
July 2005
HCPL0600, HCPL0601, HCPL0611,
HCPL0630, HCPL0631, HCPL0661
High Speed-10 MBit/s Logic Gate Optocouplers
Single Channel: HCPL0600, HCPL0601, HCPL0611
Dual Channel: HCPL0630, HCPL0631, HCPL0661
Features
■
■
■
■
■
■
■
■
Compact SO8 package
Very high speed-10 MBit/s
Superior CMR
Fan-out of 8 over -40°C to +85°C
Logic gate output
Strobable output (single channel devices)
Wired OR-open collector
U.L. recognized (File # E90700)
■
Switching power supplies
■
Pulse transformer replacement
■
Computer-peripheral interface
Description
The HCPL06XX optocouplers consist of an AlGaAS LED, opti-
cally coupled to a very high speed integrated photo-detector
logic gate with a strobable output (single channel devices). The
devices are housed in a compact small-outline package. This
output features an open collector, thereby permitting wired OR
outputs. The HCPL0600 and HCPL0601 output consists of
bipolar transistors on a bipolar process while the HCPL0611,
HCPL0630 and HCPL0631 output consists of bipolar transistors
on a CMOS process for reduced power consumption. The cou-
pled parameters are guaranteed over the temperature range of -
40°C to +85°C. A maximum input signal of 5 mA will provide a
minimum output sink current of 13 mA (fan out of 8). An internal
noise shield provides superior common mode rejection.
■
VDE approval pending
Applications
■
Ground loop elimination
■
LSTTL to TTL, LSTTL or 5-volt CMOS
■
Line receiver, data transmission
■
Data multiplexing
Package Dimensions
0.164 (4.16)
0.144 (3.66)
SEATING PLANE
Pin 1
0.202 (5.13)
0.182 (4.63)
0.019 (0.48)
0.010 (0.25)
0.006 (0.16)
0.143 (3.63)
0.123 (3.13)
0.021 (0.53)
0.011 (0.28)
0.008 (0.20)
0.003 (0.08)
0.050 (1.27)
TYP
0.244 (6.19)
0.224 (5.69)
Lead Coplanarity : 0.004 (0.10) MAX
NOTE
All dimensions are in inches (millimeters)
©2005 Fairchild Semiconductor Corporation
1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
N/C 1
8 V
CC
N/C 1
8 V
CC
+ 1
V
F1
8 V
CC
+ 2
V
F
_
3
7 V
E
+ 2
V
F
_
7 V
E
_ 2
7 V
01
6 V
O
3
6 V
O
_
V
3
6 V
02
F2
N/C 4
5 GND
N/C 4
5 GND
+ 4
5 GND
Single-channel circuit
drawing (HCPL0600 and
HCPL0601)
Single-channel circuit
drawing (HCPL0611)
Dual-channel circuit
drawing (HCPL0630, HCPL0631
and HCPL0661)
TRUTH TABLE (Positive Logic)
Input
H
L
H
L
H*
L*
Enable
H
H
L
L
NC*
NC*
Output
L
H
H
H
L*
H*
*Dual channel devices or single channel devices with pin 7 not connected.
A 0.1 µF bypass capacitor must be connected between pins 8 and 5. (See note 1)
2
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings
(No derating required up to 85°C)
Parameter
Storage Temperature
Operating Temperature
EMITTER
DC/Average Forward Input Current (each channel)
Enable Input Voltage
Not to exceed VCC by more than 500 mV
Reverse Input Voltage (each channel)
Power Dissipation
Single Channel
Dual Channel
DETECTOR
Supply Voltage
Output Current (each channel)
Output Voltage (each channel)
Collector Output Power Dissipation
Single Channel
Dual Channel
V
CC
(1 minute max)
I
O
V
O
P
O
7.0
50
7.0
85
V
mA
V
mW
Single Channel
Dual Channel
Single Channel
V
E
V
R
P
I
5.5
5.0
45
V
V
mW
Symbol
T
STG
T
OPR
I
F
Value
-40 to +125
-40 to +85
50
Units
°C
°C
mA
Recommended Operating Conditions
Parameter
Input Current, Low Level
Input Current, High Level
Supply Voltage, Output
Enable Voltage, Low Level
Enable Voltage, High Level
Operating Temperature
Fan Out (TTL load)
Output Pull-up
Symbol
I
FL
I
FH
V
CC
V
EL
V
EH
T
A
N
R
L
Min
0
*6.3
4.5
0
2.0
-40
Max
250
15
5.5
0.8
V
CC
+85
8
Units
µA
mA
V
V
V
°C
TTL Loads
Ω
330
4K
*6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less
3
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Electrical Characteristics
(T
A
= -40°C to +85°C Unless otherwise specified.)
Individual Component Characteristics
Parameter
EMITTER
Input Forward Voltage
Input Reverse Breakdown Voltage
Input Capacitance
Input Diode Temperature Coefficient
DETECTOR
High Level Supply Current
Low Level Supply Current
(V
E
= 0.5 V)
(I
F
= 0 mA, V
CC
= 5.5 V)
(V
E
= 0.5 V)
(I
F
= 10 mA, V
CC
= 5.5V)
Low Level Enable Current
High Level Enable Current
High Level Enable Voltage
Low Level Enable Voltage
(V
CC
= 5.5 V, V
E
= 0.5 V)
(V
CC
= 5.5 V, V
E
= 2.0 V)
(V
CC
= 5.5 V, I
F
= 10 mA)
(V
CC
= 5.5 V, I
F
= 10 mA)(Note 2)
Test Conditions Symbol Min Typ** Max
(I
F
= 10 mA)
T
A
=25°C
(I
R
= 10 µA)
(V
F
= 0, f = 1 MHz)
(I
F
= 10 mA)
Single Channel
Dual Channel
Single Channel
Dual Channel
Single Channel
Single Channel
Single Channel
Single Channel
I
EL
I
EH
V
EH
V
EL
2.0
0.8
I
CCL
B
VR
C
IN
∆
VF/
∆
TA
I
CCH
10
15
13
21
-1.6
-1.6
5.0
V
F
1.8
1.75
Unit
V
V
pF
mV/°C
mA
mA
mA
mA
V
V
Switching Characteristics
(T
A
= -40°C to +85°C, V
CC
= 5 V, I
F
= 7.5 mA Unless otherwise specified.)
AC Characteristics
Propagation Delay Time
to Output High Level
Propagation Delay Time
to Output Low Level
Pulse Width Distortion
Output Rise Time (10-90%)
Output Fall Time (90-10%)
Enable Propagation Delay
Time to Output High Level
Enable Propagation Delay
Time to Output Low Level
Common Mode
Transient Immunity
(at Output High Level)
Test Conditions Device
(Note 3)
(T
A
=25°C)
(T
A
=25°C)
All
(R
L
= 350
Ω
, C
L
= 15 pF) (Fig. 12)
(Note 4)
All
Symbol
T
PLH
T
PHL
|T
PHL
-T
PLH
|
t
r
t
f
t
ELH
Min
20
Typ Max Unit
75
100
ns
25
75
100
ns
(R
L
= 350
Ω
, C
L
= 15 pF) (Fig. 12)
(R
L
= 350
Ω
, C
L
= 15 pF) (Fig. 12)
(R
L
= 350
Ω
, C
L
= 15 pF)(Note 5) (Fig. 12)
(R
L
= 350
Ω
, C
L
= 15 pF)(Note 6) (Fig. 12)
All
All
All
50
12
20
35
ns
ns
ns
ns
(I
F
= 7.5 mA, V
EH
= 3.5 V) HCPL0600
(R
L
= 350
Ω
, C
L
= 15 pF) (Note 7) (Fig. 13) HCPL0601
HCPL0611
(I
F
= 7.5 mA, V
EH
= 3.5 V) HCPL0600
(R
L
= 350
Ω
, C
L
= 15 pF) (Note 8) (Fig. 13) HCPL0601
HCPL0611
(R
L
= 350
Ω
) (T
A
=25°C)
(I
F
= 0 mA, V
OH
(Min.) =
2.0 V) (Note 9)(Fig. 14)
|V
CM
| = 10 V HCPL0600
HCPL0630
|V
CM
| = 50 V HCPL0601
HCPL0631
|V
CM
| = 1,000 V HCPL0611
HCPL0661
t
EHL
20
ns
|CM
H
|
5000
25,000
|CM
H
|
5000
25,000
V/µs
Common Mode
Transient Immunity
(at Output Low Level)
(R
L
= 350Ω) (T
A
=25°C)
(I
F
= 7.5 mA, V
OL
(Max.) =
0.8 V) (Note 10)(Fig. 14)
|V
CM
| = 10 V HCPL0600
HCPL0630
|V
CM
| = 50 V HCPL0601
HCPL0631
|V
CM
| = 1,000 V HCPL0611
HCPL0661
V/µs
4
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
www.fairchildsemi.com
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Transfer Characteristics
(T
A
= -40°C to +85°C Unless otherwise specified.)
DC Characteristics
High Level Output Current
Low Level Output Voltage
Input Threshold Current
Test Conditions Symbol
(V
CC
= 5.5 V, V
O
= 5.5 V)
(I
F
= 250 µA, V
E
= 2.0 V) (Note 2)
(V
CC
= 5.5 V, I
F
= 5 mA)
(V
E
= 2.0 V, I
OL
= 13 mA) (Note 2)
(V
CC
= 5.5 V, V
O
= 0.6 V,
V
E
= 2.0 V, I
OL
= 13 mA)
I
OH
V
OL
I
FT
Min
Typ**
Max
100
0.6
5
Unit
µA
V
mA
Isolation Characteristics
(T
A
= -40°C to +85°C Unless otherwise specified.)
Characteristics
Input-Output
Insulation Leakage Current
Test Conditions
(Relative humidity = 45%)
(T
A
= 25°C, t = 5 s)
(V
I-O
= 3000 VDC)
(Note 11)
(R
H
< 50%, T
A
= 25°C)
(Note 11) ( t = 1 min.)
(V
I-O
= 500 V) (Note 11)
(f = 1 MHz) (Note 11)
Symbol
I
I-O
Min
Typ**
Max
1.0*
Unit
µA
Withstand Insulation Test Voltage
Resistance (Input to Output)
Capacitance (Input to Output)
V
ISO
R
I-O
C
I-O
2500
10
12
0.6
V
RMS
Ω
pF
** All typical values are at V
CC
= 5 V, T
A
= 25°C
NOTES
1. The V
CC
supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid
tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V
CC
and
GND pins of each device.
2. Enable Input - No pull up resistor required as the device has an internal pull up resistor.
3. t
PLH
- Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5V
level on the LOW to HIGH transition of the output voltage pulse.
4. t
PHL
- Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5V
level on the HIGH to LOW transition of the output voltage pulse.
5. t
r
- Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
6. t
f
- Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
7. t
ELH
- Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse to
the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
8. t
EHL
- Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse to
the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
9. CM
H
- The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., V
OUT
> 2.0 V). Measured in volts per microsecond (V/µs).
10. CM
L
- The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e.,
V
OUT
< 0.8 V). Measured in volts per microsecond (V/µs).
11. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
5
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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