HUFA75631SK8
Data Sheet
December 2001
5.5A, 100V, 0.039 Ohm, N-Channel,
UltraFET® Power MOSFET
Packaging
JEDEC MS-012AA
BRANDING DASH
Features
• Ultra Low On-Resistance
- r
DS(ON)
= 0.039Ω,
V
GS
=
10V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
DRAIN (8)
DRAIN (7)
DRAIN (6)
DRAIN (5)
5
1
2
3
4
Symbol
SOURCE (1)
SOURCE (2)
SOURCE (3)
GATE (4)
Ordering Information
PART NUMBER
HUFA75631SK8
PACKAGE
MS-012AA
BRAND
75631SK8
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUFA75631SK8T.
Absolute Maximum Ratings
T
A
= 25
o
C, Unless Otherwise Specified
HUFA75631SK8
UNITS
V
V
V
A
A
100
100
±20
5.5
3.5
Figure 4
Figures 6, 14, 15
2.5
20
-55 to 150
300
260
W
mW/
o
C
o
C
o
C
o
C
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Drain Current
Continuous (T
A
= 25
o
C, V
GS
= 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 100
o
C, V
GS
= 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
NOTES:
1. T
J
= 25
o
C to 150
o
C.
2. 50
o
C/W measured using FR-4 board with 0.76 in
2
(490.3 mm
2
) copper pad at 10 second.
3. 152
o
C/W measured using FR-4 board with 0.054 in
2
(34.8 mm
2
) copper pad at 1000 seconds
4. 189
o
C/W measured using FR-4 board with 0.0115 in
2
(7.42 mm
2
) copper pad at 1000 seconds
CAUTION:
Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For a copy
of the requirements, see AEC Q101 at: http://www.aecouncil.com/
Reliability data can be found at: http://www.fairchildsemi.com/products/discrete/reliability/index.html.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation
HUFA75631SK8 Rev. B
HUFA75631SK8
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
DSS
I
D
= 250µA, V
GS
= 0V (Figure 11)
V
DS
= 95V, V
GS
= 0V
V
DS
= 90V, V
GS
= 0V, T
A
= 150
o
C
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
THERMAL SPECIFICATIONS
Thermal Resistance Junction to
Ambient
R
θJA
Pad Area = 0.76 in
2
(490.3 mm
2
) (Note 2)
(Figures 20, 21)
Pad Area = 0.054 in
2
(34.8 mm
2
) (Note 3)
(Figures 20, 21)
Pad Area = 0.0115 in
2
(7.42 mm
2
)(Note 4)
(Figures 20, 21)
SWITCHING SPECIFICATIONS
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
ISS
C
OSS
C
RSS
V
DS
= 25V, V
GS
= 0V, f = 1MHz
(Figure 12)
-
-
-
1225
330
105
-
-
-
pF
pF
pF
Q
g(TOT)
Q
g(10)
Q
g(TH)
Q
gs
Q
gd
V
GS
= 0V to 20V
V
GS
= 0V to 10V
V
GS
= 0V to 2V
V
DD
= 50V, I
D
= 5.5A,
I
g(REF)
= 1.0mA
(Figures 13, 16, 17)
-
-
-
-
-
66
35
2.4
4.75
12
79
43
2.9
-
-
nC
nC
nC
nC
nC
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 50V, I
D
= 5.5A
V
GS
=
10V, R
GS
= 6.8Ω
(Figures 18, 19)
-
-
-
-
-
-
-
11
23
39
31
-
50
-
-
-
-
105
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
50
152
189
o
C/W
o
C/W
o
C/W
T
A
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
100
-
-
-
-
-
-
-
-
1
250
±100
V
µA
µA
nA
I
GSS
V
GS
=
±20V
V
GS(TH)
r
DS(ON)
V
GS
= V
DS
, I
D
= 250µA (Figure 10)
I
D
= 5.5A, V
GS
= 10V (Figure 9)
2
-
-
0.033
4
0.039
V
Ω
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
SYMBOL
V
SD
I
SD
= 5.5 A
I
SD
= 2.5 A
Reverse Recovery Time
Reverse Recovered Charge
t
rr
Q
RR
I
SD
= 5.5 A, dI
SD
/dt = 100A/µs
I
SD
= 5.5 A, dI
SD
/dt = 100A/µs
TEST CONDITIONS
MIN
-
-
-
-
TYP
-
-
-
-
MAX
1.25
1.00
96
310
UNITS
V
V
ns
nC
©2001 Fairchild Semiconductor Corporation
HUFA75631SK8 Rev. B
HUFA75631SK8
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
6
V
GS
= 10V, R
θJA
= 50
o
C/W
I
D
, DRAIN CURRENT (A)
5
4
3
2
1
0
25
50
75
100
125
T
A
, AMBIENT TEMPERATURE (
o
C)
150
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
10
THERMAL IMPEDANCE
Z
θJA
, NORMALIZED
1
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
R
θJA
= 50
o
C/W
0.1
P
DM
t
1
0.01
SINGLE PULSE
0.001
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
t, RECTANGULAR PULSE DURATION (s)
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJA
x R
θJA
+ T
A
10
1
10
2
10
3
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
500
R
θJA
= 50
o
C/W
I
DM
, PEAK CURRENT (A)
100
V
GS
= 10V
T
A
= 25
o
C
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I = I
25
150 - T
A
125
10
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
1
10
-5
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (s)
10
0
10
1
10
2
10
3
FIGURE 4. PEAK CURRENT CAPABILITY
©2001 Fairchild Semiconductor Corporation
HUFA75631SK8 Rev. B
HUFA75631SK8
Typical Performance Curves
200
100
I
D
, DRAIN CURRENT (A)
R
θJA
= 50
o
C/W
(Continued)
100
I
AS
, AVALANCHE CURRENT (A)
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
100µs
10
10
1
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
SINGLE PULSE
T
J
= MAX RATED
T
A
= 25
o
C
1
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
1ms
10ms
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
0.1
100
200
1
0.01
0.1
1
10
t
AV
, TIME IN AVALANCHE (ms)
100
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
50
I
D,
DRAIN CURRENT (A)
I
D
, DRAIN CURRENT (A)
40
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DD
= 15V
50
V
GS
= 20V
V
GS
= 10V
40
V
GS
= 7V
V
GS
= 6V
30
30
V
GS
=5V
20
T
J
= 150
o
C
T
J
= 25
o
C
20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T
A
= 25
o
C
0
1
2
3
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
4
10
10
0
2
T
J
= -55
o
C
3
4
5
V
GS
, GATE TO SOURCE VOLTAGE (V)
6
0
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
2.5
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
2.0
NORMALIZED GATE
THRESHOLD VOLTAGE
1.2
V
GS
= V
DS
, I
D
= 250µA
1.0
1.5
0.8
1.0
V
GS
= 10V, I
D
= 5.5A
0.5
-80
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
0.6
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
©2001 Fairchild Semiconductor Corporation
HUFA75631SK8 Rev. B
HUFA75631SK8
Typical Performance Curves
1.2
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
I
D
= 250µA
(Continued)
3000
C
ISS
=
C
GS
+ C
GD
C, CAPACITANCE (pF)
1000
C
RSS
=
C
GD
1.1
1.0
C
OSS
≅
C
DS
+ C
GD
100
V
GS
= 0V, f = 1MHz
0.9
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
30
0.1
1.0
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
V
DD
= 50V
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
I
D
= 5.5A
I
D
= 2A
0
10
20
30
Q
g
, GATE CHARGE (nC)
40
2
0
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
V
DS
BV
DSS
L
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
V
GS
DUT
t
P
R
G
-
I
AS
V
DD
t
P
V
DS
V
DD
+
0V
I
AS
0.01Ω
0
t
AV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
©2001 Fairchild Semiconductor Corporation
HUFA75631SK8 Rev. B
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