HUF76407DK8
Data Sheet
December 2001
3.5A, 60V, 0.105 Ohm, Dual N-Channel,
Logic Level UltraFET® Power MOSFET
Packaging
JEDEC MS-012AA
BRANDING DASH
Features
• Ultra Low On-Resistance
- r
DS(ON)
= 0.090Ω,
V
GS
=
10V
- r
DS(ON)
= 0.105Ω,
V
GS
=
5V
5
1
2
3
4
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- SPICE and SABER Thermal Impedance Models
- www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
Symbol
SOURCE1 (1)
GATE1 (2)
DRAIN 1 (8)
DRAIN 1 (7)
• Transient Thermal Impedance Curve vs Board Mounting
Area
• Switching Time vs R
GS
Curves
SOURCE2 (3)
GATE2 (4)
DRAIN 2 (6)
DRAIN 2 (5)
Ordering Information
PART NUMBER
HUF76407DK8
PACKAGE
MS-012AA
BRAND
76407DK8
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76407DK8T.
Absolute Maximum Ratings
T
A
= 25
o
C, Unless Otherwise Specified
HUF76407DK8
60
60
±16
3.5
3.8
1.0
1.0
Figure 4
Figures 6, 17, 18
2.5
20
-55 to 150
300
260
UNITS
V
V
V
A
A
A
A
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Drain Current
Continuous (T
A
= 25
o
C, V
GS
= 5V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 25
o
C, V
GS
= 10V) (Figure 2) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 100
o
C, V
GS
= 5V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 100
o
C, V
GS
= 4.5V) (Figure 2) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS
Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
NOTES:
1. T
J
= 25
o
C to 125
o
C.
2. 50
o
C/W measured using FR-4 board with 0.76 in
2
(490.3 mm
2
) copper pad at 1 second.
3. 228
o
C/W measured using FR-4 board with 0.006 in
2
(3.87 mm
2
) copper pad at 1000 seconds.
W
mW/
o
C
o
C
o
C
o
C
CAUTION:
Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation
HUF76407DK8 Rev. B
HUF76407DK8
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
BV
DSS
I
DSS
I
GSS
V
GS(TH)
r
DS(ON)
I
D
= 250µA, V
GS
= 0V (Figure 12)
I
D
= 250µA, V
GS
= 0V , T
A
= -40
o
C (Figure 12)
Zero Gate Voltage Drain Current
V
DS
= 55V, V
GS
= 0V
V
DS
= 50V, V
GS
= 0V, T
A
= 150
o
C
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
V
GS
= V
DS
, I
D
= 250µA (Figure 11)
I
D
= 3.8A, V
GS
= 10V (Figures 9, 10)
I
D
= 1.0A, V
GS
= 5V (Figure 9)
I
D
= 1.0A, V
GS
= 4.5V (Figure 9)
THERMAL SPECIFICATIONS
Thermal Resistance Junction to
Ambient
R
θJA
Pad Area = 0.76 in
2
(490.3 mm
2
) (Note 2)
Pad Area = 0.027 in
2
(17.4 mm
2
) (Figure 23)
Pad Area = 0.006 in
2
(3.87 mm
2
) (Figure 23)
SWITCHING SPECIFICATIONS
(V
GS
= 4.5V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
Q
g(TOT)
Q
g(5)
Q
g(TH)
Q
gs
Q
gd
C
ISS
C
OSS
C
RSS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
(Figure 13)
V
GS
= 0V to 10V
V
GS
= 0V to 5V
V
GS
= 0V to 1V
V
DD
= 30V,
I
D
= 1.0A,
I
g(REF)
= 1.0mA
(Figures 14, 19, 20)
V
DD
= 30V, I
D
= 3.8A
V
GS
=
10V,
R
GS
= 30Ω
(Figures 16, 21, 22)
V
DD
= 30V, I
D
= 1.0A
V
GS
=
4.5V, R
GS
= 27Ω
(Figures 15, 21, 22)
-
-
-
-
-
-
-
8
30
25
25
-
57
-
-
-
-
75
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
50
191
228
o
C/W
o
C/W
o
C/W
T
A
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
60
55
-
-
-
-
-
-
-
-
-
-
1
250
±100
V
V
µA
µA
nA
V
GS
=
±16V
1
-
-
-
-
0.075
0.088
0.092
3
0.090
0.105
0.110
V
Ω
Ω
Ω
SWITCHING SPECIFICATIONS
(V
GS
= 10V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
-
-
-
330
100
18
-
-
-
pF
pF
pF
-
-
-
-
-
9.4
5.3
0.42
1.05
2.4
11.2
6.4
0.5
-
-
nC
nC
nC
nC
nC
-
-
-
-
-
-
-
5
11
46
31
-
24
-
-
-
-
116
ns
ns
ns
ns
ns
ns
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
SYMBOL
V
SD
t
rr
Q
RR
I
SD
= 3.8A
I
SD
= 1.0A
Reverse Recovery Time
Reverse Recovered Charge
I
SD
= 1.0A, dI
SD
/dt = 100A/µs
I
SD
= 1.0A, dI
SD
/dt = 100A/µs
TEST CONDITIONS
MIN
-
-
-
-
TYP
-
-
-
-
MAX
1.25
1.00
48
89
UNITS
V
V
ns
nC
©2001 Fairchild Semiconductor Corporation
HUF76407DK8 Rev. B
HUF76407DK8
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
0
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
4
V
GS
= 10V, R
θJA
= 50
o
C/W
3
I
D
, DRAIN CURRENT (A)
2
1
V
GS
= 4.5V, R
θJA
= 228
o
C/W
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
2
1
THERMAL IMPEDANCE
Z
θJA
, NORMALIZED
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJA
x R
θJA
+ T
A
10
-2
10
-1
10
0
10
1
10
2
10
3
R
θJA
= 228
o
C/W
0.1
0.01
SINGLE PULSE
0.001
10
-5
10
-4
10
-3
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
200
100
I
DM
, PEAK CURRENT (A)
R
θJA
= 228
o
C/W
T
C
= 25
o
C
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I = I
25
150 - T
A
125
V
GS
= 5V
10
1
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (s)
10
0
10
1
10
2
10
3
10
-5
FIGURE 4. PEAK CURRENT CAPABILITY
©2001 Fairchild Semiconductor Corporation
HUF76407DK8 Rev. B
HUF76407DK8
Typical Performance Curves
500
R
θJA
I
D
, DRAIN CURRENT (A)
100
= 228
o
C/W
(Continued)
50
I
AS
, AVALANCHE CURRENT (A)
SINGLE PULSE
T
J
= MAX RATED
T
A
= 25
o
C
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
10
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
10
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
100µs
1ms
10ms
1
0.1
1
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
100
200
1
0.01
0.1
1
10
t
AV
, TIME IN AVALANCHE (ms)
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DD
= 15V
T
J
= -55
o
C
20
V
GS
= 10V
I
D
, DRAIN CURRENT (A)
T
J
= 25
o
C
V
GS
= 5V
15
V
GS
= 4V
10
V
GS
= 3.5V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T
A
= 25
o
C
V
GS
= 3V
4
V
GS
= 4.5V
I
D,
DRAIN CURRENT (A)
15
T
J
= 150
o
C
10
5
5
0
2.0
2.5
3.0
3.5
4.5
4.0
V
GS
, GATE TO SOURCE VOLTAGE (V)
5.0
0
0
1
2
3
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
150
r
DS(ON)
, DRAIN TO SOURCE
ON RESISTANCE (mΩ)
2.0
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
I
D
= 3.8A
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
GS
= 10V, I
D
= 3.8A
120
1.5
I
D
= 1A
90
1.0
60
2
3
5
7
4
6
8
V
GS
, GATE TO SOURCE VOLTAGE (V)
9
10
0.5
-80
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
©2001 Fairchild Semiconductor Corporation
HUF76407DK8 Rev. B
HUF76407DK8
Typical Performance Curves
1.2
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
V
GS
= V
DS
, I
D
= 250µA
NORMALIZED GATE
THRESHOLD VOLTAGE
(Continued)
1.2
I
D
= 250µA
1.0
1.1
0.8
1.0
0.6
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
0.9
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
1000
C
ISS
=
C
GS
+ C
GD
C, CAPACITANCE (pF)
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
DD
= 30V
8
6
100
C
OSS
≅
C
DS
+ C
GD
4
WAVEFORMS IN
DESCENDING ORDER:
I
D
= 3.8A
I
D
= 1.0A
0
2
4
6
Q
g
, GATE CHARGE (nC)
8
10
2
10
V
GS
= 0V, f = 1MHz
5
0.1
1.0
C
RSS
=
C
GD
0
10
60
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
50
V
GS
= 4.5V, V
DD
= 30V, I
D
= 1.0A
SWITCHING TIME (ns)
40
t
f
30
t
d(OFF)
t
r
SWITCHING TIME (ns)
80
V
GS
= 10V, V
DD
= 30V, I
D
= 3.8A
t
d(OFF)
60
t
f
40
20
t
d(ON)
10
20
t
r
t
d(ON)
0
0
10
20
30
40
R
GS
, GATE TO SOURCE RESISTANCE (Ω)
50
0
0
20
30
40
R
GS
, GATE TO SOURCE RESISTANCE (Ω)
10
50
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
©2001 Fairchild Semiconductor Corporation
HUF76407DK8 Rev. B
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