HUF76121D3, HUF76121D3S
Data Sheet
January 2003
20A, 30V, 0.023 Ohm, N-Channel, Logic
Level UltraFET Power MOSFETs
These N-Channel power MOSFETs
are manufactured using the
innovative UltraFET™ process.
This advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding performance. This device is capable
of withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery-operated products.
Formerly developmental type TA76121.
Features
• Logic Level Gate Drive
• 20A, 30V
• Ultra Low On-Resistance, r
DS(ON)
= 0.023Ω
• Temperature Compensating PSPICE
®
Model
• Temperature Compensating SABER
©
Model
• Thermal Impedance SPICE Model
• Thermal Impedance SABER Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Ordering Information
PART NUMBER
HUF76121D3
HUF76121D3S
PACKAGE
TO-251AA
TO-252AA
BRAND
76121D
76121D
Symbol
D
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-252AA variant in tape and reel, e.g., HUF76121D3ST.
G
S
Packaging
JEDEC TO-251AA
SOURCE
DRAIN
GATE
JEDEC TO-252AA
DRAIN
(FLANGE)
GATE
SOURCE
DRAIN
(FLANGE)
©2003 Fairchild Semiconductor Corporation
HUF76121D3, HUF76121D3S Rev. B1
HUF76121D3, HUF76121D3S
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Drain Current
Continuous (T
C
= 25
o
C, V
GS
= 10V) (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
C
= 100
o
C, V
GS
= 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
C
= 100
o
C, V
GS
= 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
30
30
±20
20
20
20
Figure 4
Figures 6, 17, 18
75
0.6
-55 to 150
300
260
W
W/
o
C
o
C
o
C
o
C
V
V
V
A
A
A
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 150
o
C.
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
T
A
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
DSS
I
D
= 250µA, V
GS
= 0V (Figure 12)
V
DS
= 25V, V
GS
= 0V
V
DS
= 25V, V
GS
= 0V, T
C
= 150
o
C
30
-
-
-
-
-
-
-
-
1
250
±100
V
µA
µA
nA
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
I
GSS
V
GS
=
±20V
V
GS(TH)
r
DS(ON)
V
GS
= V
DS
, I
D
= 250µA (Figure 11)
I
D
= 20A, V
GS
= 10V (Figure 9, 10)
I
D
= 20A, V
GS
= 5V (Figure 9)
I
D
= 20A, V
GS
= 4.5V (Figure 9)
1
-
-
-
-
0.017
0.021
0.023
3
0.023
0.030
0.033
V
Ω
Ω
Ω
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
SWITCHING SPECIFICATIONS
(V
GS
= 4.5V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 15V, I
D
≅
20A,
R
L
= 0.75Ω, V
GS
=
4.5V,
R
GS
= 11.0Ω
(Figures 15, 21, 22)
-
-
-
-
-
-
-
18
165
18
40
-
275
-
-
-
-
87
ns
ns
ns
ns
ns
ns
R
θJC
R
θJA
(Figure 3)
TO-251AA, TO-252AA
-
-
-
-
1.66
100
o
C/W
o
C/W
©2003 Fairchild Semiconductor Corporation
HUF76121D3, HUF76121D3S Rev. B1
HUF76121D3, HUF76121D3S
Electrical Specifications
PARAMETER
SWITCHING SPECIFICATIONS
(V
GS
= 10V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
ISS
C
OSS
C
RSS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
(Figure 13)
-
-
-
850
465
100
-
-
-
pF
pF
pF
Q
g(TOT)
Q
g(5)
Q
g(TH)
Q
gs
Q
gd
V
GS
= 0V to 10V
V
GS
= 0V to 5V
V
GS
= 0V to 1V
V
DD
= 15V,
I
D
≅
20A,
R
L
= 0.75Ω
I
g(REF)
= 1.0mA
(Figures 14, 19, 20)
-
-
2.40
7.40
-
-
nC
nC
-
-
-
24
13
1.0
30
16
1.2
nC
nC
nC
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 15V, I
D
≅
20A,
R
L
= 0.75Ω, V
GS
= 10V,
R
GS
= 12.0Ω
(Figures 16, 21, 22)
-
-
-
-
-
-
-
6
50
45
45
-
85
-
-
-
-
135
ns
ns
ns
ns
ns
ns
T
A
= 25
o
C, Unless Otherwise Specified
(Continued)
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovered Charge
SYMBOL
V
SD
t
rr
Q
RR
I
SD
= 20A
I
SD
= 20A, dI
SD
/dt = 100A/µs
I
SD
= 20A, dI
SD
/dt = 100A/µs
TEST CONDITIONS
MIN
-
-
-
TYP
-
-
-
MAX
1.25
58
70
UNITS
V
ns
nC
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
175
T
C
, CASE TEMPERATURE (
o
C)
I
D
, DRAIN CURRENT (A)
25
20
15
V
GS
= 10V
10
V
GS
= 4.5V
5
0
25
50
75
100
125
T
C
, CASE TEMPERATURE (
o
C)
150
175
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
©2003 Fairchild Semiconductor Corporation
HUF76121D3, HUF76121D3S Rev. B1
HUF76121D3, HUF76121D3S
Typical Performance Curves
2
1
THERMAL IMPEDANCE
Z
θJC
, NORMALIZED
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
SINGLE PULSE
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θ
JC
x R
θ
JC
+ T
C
10
-3
10
-2
10
-1
10
0
10
1
(Continued)
0.01
10
-5
10
-4
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
1000
T
C
= 25
o
C
I
DM
, PEAK CURRENT (A)
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I
V
GS
= 10V
100
V
GS
= 5V
=
I
25
175 - T
C
150
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
10
-5
10
-4
10
-3
10
-2
t, PULSE WIDTH (s)
10
-1
10
0
10
1
FIGURE 4. PEAK CURRENT CAPABILITY
500
300
I
AS
, AVALANCHE CURRENT (A)
T
J
= MAX RATED
T
C
= 25
o
C
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
STARTING T
J
= 25
o
C
10
STARTING T
J
= 150
o
C
100
I
D
, DRAIN CURRENT (A)
100
100µs
10
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
1
1
BV
DSS MAX
= 30V
1ms
10ms
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
100
1
0.001
0.01
0.1
1
10
100
t
AV
, TIME IN AVALANCHE (ms)
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
©2003 Fairchild Semiconductor Corporation
HUF76121D3, HUF76121D3S Rev. B1
HUF76121D3, HUF76121D3S
Typical Performance Curves
75
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
I
D
, DRAIN CURRENT (A)
60
-55
o
C
25
o
C
I
D
, DRAIN CURRENT (A)
60
V
GS
= 4V
45
V
GS
= 3.5V
(Continued)
75
V
GS
= 4.5V
45
175
o
C
30
30
15
V
DD
= 15V
0
0
2
1
3
4
V
GS
, GATE TO SOURCE VOLTAGE (V)
5
15
V
GS
= 3V
V DURATION
PULSE
GS
= 10V = 80µs
DUTY V
GS
= 5V 0.5% MAX
CYCLE =
0
1
2
3
4
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
5
0
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
35
r
DS(ON)
, ON-STATE RESISTANCE (mΩ)
I
D
= 20A
30
I
D
= 10A
25
I
D
= 1A
20
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.6
PULSE DURATION = 250µs, V
GS
= 10V, I
D
= 20A
1.4
1.2
1.0
0.8
15
2
4
6
8
V
GS
, GATE TO SOURCE VOLTAGE (V)
10
0.6
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 9. SOURCE TO DRAIN ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
1.2
NORMALIZED DRAIN TO SOURCE
BREAKOWN VOLTAGE
V
GS
= V
DS
, I
D
= 250µA
NORMALIZED GATE
THRESHOLD VOLTAGE
1.2
I
D
= 250µA
1.0
1.1
0.8
1.0
0.6
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
1.0
-80
-40
0
40
80
0.12k
0.16k
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
©2003 Fairchild Semiconductor Corporation
HUF76121D3, HUF76121D3S Rev. B1
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