HUF76112SK8
TM
Data Sheet
April 2000
File Number
4834.1
7.5A, 30V, 0.026 Ohm, N-Channel, Logic
Level Power MOSFET
The HUF76112SK8 is an Application-Specific MOSFET
optimized for switching when used as the upper switch in
synchronous buck applications. The low gate charge and low
input capacitance results in lower driver and lower switching
losses, thereby increasing the overall system efficiency.
Features
• 7.5A, 30V
- r
DS(ON)
= 0.026Ω, V
GS
=
10V
- r
DS(ON)
= 0.033Ω, V
GS
=
5V
• PWM Optimized for Synchronous Buck Applications
• Fast Switching
• Low Gate Charge
- Q
g
Total 15nC (Typ)
• Low Capacitance
- C
ISS
725pF (Typ)
- C
RSS
36pF (Typ)
Symbol
SOURCE (1)
SOURCE (2)
SOURCE (3)
GATE (4)
DRAIN (8)
DRAIN (7)
DRAIN (6)
DRAIN (5)
Packaging
SO8 (JEDEC MS-012AA)
BRANDING DASH
Ordering Information
5
PART NUMBER
HUF76112SK8
PACKAGE
MS-012AA
BRAND
76112SK8
1
2
3
4
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the HUF76112SK8 in tape and reel, e.g., HUF76112SK8T.
T
A
= 25
o
C, Unless Otherwise Specified
PARAMETER
HUF76112SK8
30
30
±16
7.5
4.0
Figure 4
2.5
20
-55 to 150
300
260
50
152
189
UNITS
V
V
V
A
A
A
W
mW/
o
C
o
C
o
C
o
C
o
C/W
o
C/W
o
C/W
Absolute Maximum Ratings
SYMBOL
V
DSS
V
DGR
V
GS
I
D
I
D
I
DM
P
D
T
J
, T
STG
T
L
T
pkg
Drain to Source Voltage (Note 1)
Drain to Gate Voltage (R
GS
= 20kΩ) (Note 1)
Gate to Source Voltage
Drain Current
Continuous (T
A
= 25
o
C, V
GS
= 10V) (Figure 2) (Note 2)
Continuous (T
A
= 100
o
C, V
GS
= 5V) (Note 2)
Pulsed Drain Current
Power Dissipation (Note 2)
Derate Above 25
o
C
Operating and Storage Temperature
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s
Package Body for 10s, See Techbrief TB334
Thermal Resistance Junction to Ambient
Measured using FR-4 board with 0.76 in
2
(490.3 mm
2
) copper pad at 10
second.
THERMAL SPECIFICATIONS
R
θJA
Measured using FR-4 board with 0.054 in
2
(34.8 mm
2
) copper pad at 1000
seconds. (Figure 23)
Measured using FR-4 board with 0.0115 in
2
(7.42 mm
2
) copper pad at 1000
seconds. (Figure 23)
NOTES:
1. T
J
= 25
o
C to 125
o
C.
2. R
θJA
= 50
o
C/W
CAUTION:
Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
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©
Intersil Corporation 2000
UltraFET® is a registered trademark of Intersil Corporation.
HUF76112SK8
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
DSS
I
D
= 250µA, V
GS
= 0V (Figure 12)
V
DS
= 25V, V
GS
= 0V
V
DS
= 25V, V
GS
= 0V, T
A
= 150
o
C
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
V
GS(TH)
r
DS(ON)
V
GS
= V
DS
, I
D
= 250µA (Figure 11)
I
D
= 7.5A, V
GS
= 10V (Figures 9, 10)
I
D
= 4.0A, V
GS
= 5V (Figure 9)
SWITCHING SPECIFICATIONS
(V
GS
= 5V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 15V, I
D
= 4.0A
V
GS
=
5V,
R
GS
= 20Ω
(Figures 15, 21, 22)
-
-
-
-
-
-
-
11
40
35
32
-
77
-
-
-
-
100
ns
ns
ns
ns
ns
ns
1
-
-
-
0.022
0.027
3
0.026
0.033
V
Ω
Ω
I
GSS
V
GS
=
±16V
30
-
-
-
-
-
-
-
-
1
250
±100
V
µA
µA
nA
T
A
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SWITCHING SPECIFICATIONS
(V
GS
= 10V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge at 10V
Total Gate Charge at 5V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
ISS
C
OSS
C
RSS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
(Figures 13)
-
-
-
725
325
36
-
-
-
pF
pF
pF
Q
g(TOT)
Q
g(TOT)
Q
g(TH)
Q
gs
Q
gd
V
GS
= 0V to 10V
V
GS
= 0V to 5V
V
GS
= 0V to 1V
V
DD
= 15V,
I
D
= 7.5A,
I
g(REF)
= 1.0mA
(Figures 14, 19, 20)
-
-
-
-
-
15
7.2
0.74
2.1
2.9
18
8.7
0.9
-
-
nC
nC
nC
nC
nC
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 15V, I
D
= 7.5A
V
GS
=
10V,
R
GS
= 20Ω
(Figures 16, 21, 22)
-
-
-
-
-
-
-
7.2
43
52
45
-
75
-
-
-
-
145
ns
ns
ns
ns
ns
ns
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
SYMBOL
V
SD
I
SD
= 7.5A
I
SD
= 4A
Reverse Recovery Time
Reverse Recovered Charge
t
rr
Q
RR
I
SD
= 7.5A, dI
SD
/dt = 100A/µs
I
SD
= 7.5A, dI
SD
/dt = 100A/µs
TEST CONDITIONS
MIN
-
-
-
-
TYP
-
-
-
-
MAX
1.25
1.00
25
14
UNITS
V
V
ns
nC
2
HUF76112SK8
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
I
D
, DRAIN CURRENT (A)
6
0.8
0.6
0.4
0.2
0
0
0
25
50
75
100
125
150
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
T
A
, AMBIENT TEMPERATURE (
o
C)
8
V
GS
= 10V, R
θJA
= 50
o
C/W
4
2
V
GS
= 5V, R
θJA
= 189
o
C/W
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
3
1
THERMAL IMPEDANCE
Z
θJA
, NORMALIZED
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJA
x R
θJA
+ T
A
10
-2
10
-1
10
0
10
1
10
2
10
3
R
θJA
= 50
o
C/W
0.1
0.01
SINGLE PULSE
0.001
10
-5
10
-4
10
-3
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
1000
R
θJA
= 50
o
C/W
T
A
= 25
o
C
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I
DM
, PEAK CURRENT (A)
100
V
GS
= 5V
V
GS
= 10V
I = I
25
150 - T
A
125
10
1
10
-5
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (s)
10
0
10
1
10
2
10
3
FIGURE 4. PEAK CURRENT CAPABILITY
3
HUF76112SK8
Typical Performance Curves
500
R
θJA
= 50
o
C/W
I
AS
, AVALANCHE CURRENT (A)
I
D
, DRAIN CURRENT (A)
SINGLE PULSE
T
J
= MAX RATED
T
A
= 25
o
C
100µs
(Continued)
200
100
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
100
10
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
1
1
10
10
STARTING T
J
= 150
o
C
STARTING T
J
= 25
o
C
1ms
10ms
100
1
0.01
0.1
1
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
t
AV
, TIME IN AVALANCHE (ms)
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
25
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DD
= 15V
I
D
, DRAIN CURRENT (A)
25
V
GS
=
10V
20
V
GS
= 5V
V
GS
= 4.5V
15
V
GS
= 4V
V
GS
= 3.5V
10
V
GS
= 3V
5
T
A
= 25
o
C
0
0.5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.0
1.5
2.0
I
D,
DRAIN CURRENT (A)
20
15
10
T
J
= 150
o
C
5
T
J
= -55
o
C
0
1.5
2.0
2.5
3.0
3.5
4.0
V
GS
, GATE TO SOURCE VOLTAGE (V)
T
J
= 25
o
C
0
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
50
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
r
DS(ON)
, DRAIN TO SOURCE
ON RESISTANCE (mΩ)
40
I
D
= 7.5A
1.6
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
GS
= 10V, I
D
= 7.5A
1.3
30
I
D
= 1A
20
1.0
10
2
4
6
8
V
GS
, GATE TO SOURCE VOLTAGE (V)
10
0.7
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
4
HUF76112SK8
Typical Performance Curves
1.2
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
V
GS
= V
DS
, I
D
= 250µA
NORMALIZED GATE
THRESHOLD VOLTAGE
(Continued)
1.2
I
D
= 250µA
1.0
1.1
0.8
1.0
0.6
-80
-40
0
40
80
120
160
0.9
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
2000
1000
C, CAPACITANCE (pF)
10
C
ISS
=
C
GS
+ C
GD
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
DD
= 15V
8
C
OSS
≅
C
DS
+ C
GD
6
4
WAVEFORMS IN
DESCENDING ORDER:
I
D
= 7.5A
I
D
= 1A
0
3
6
9
12
15
100
C
RSS
=
C
GD
2
V
GS
= 0V, f = 1MHz
20
0.1
1.0
10
30
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
0
Q
g
, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
80
V
GS
= 5V, V
DD
= 15V, I
D
= 4.0A
SWITCHING TIME (ns)
60
t
d(OFF)
120
V
GS
= 10V, V
DD
= 15V, I
D
= 7.5A
100
SWITCHING TIME (ns)
80
t
f
60
40
20
0
t
r
t
d(OFF)
t
f
40
t
r
20
t
d(ON)
0
0
10
20
30
40
50
R
GS
, GATE TO SOURCE RESISTANCE (Ω)
t
d(ON)
0
10
20
30
40
50
R
GS
, GATE TO SOURCE RESISTANCE (Ω)
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
5
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