HUF76113SK8
Data Sheet
January 2003
6.5A, 30V, 0.030 Ohm, N-Channel, Logic
Level UltraFET Power MOSFET
This N-Channel power MOSFET is
manufactured using the innovative
UltraFET™ process. This advanced
process technology achieves the
lowest possible on-resistance per silicon area, resulting in
outstanding performance. This device is capable of
withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators, switching
converters, motor drivers, relay drivers, low-voltage bus
switches, and power management in portable and battery-
operated products.
Formerly developmental type TA76113.
Features
• Logic Level Gate Drive
• 6.5A, 30V
• Ultra Low On-Resistance, r
DS(ON)
= 0.030Ω
• Temperature Compensating PSPICE
®
Model
• Temperature Compensating SABER™ Model
• Thermal Impedance SPICE Model
• Thermal Impedance SABER Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Ordering Information
PART NUMBER
HUF76113SK8
PACKAGE
MS-012AA
BRAND
76113SK8
Symbol
NC(1)
DRAIN(8)
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76113SK8T.
SOURCE(2)
DRAIN(7)
SOURCE(3)
DRAIN(6)
GATE(4)
DRAIN(5)
Packaging
JEDEC MS-012AA
BRANDING DASH
5
1
2
3
4
©2003 Fairchild Semiconductor Corporation
HUF76113SK8 Rev. B1
HUF76113SK8
Absolute Maximum Ratings
T
A
= 25
o
C, Unless Otherwise Specified
HUF76113SK8
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Drain Current
Continuous (T
A
= 25
o
C, V
GS
= 10V) (Figure 2) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 100
o
C, V
GS
= 5V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 100
o
C, V
GS
= 4.5V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
ASB
Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
30
30
±20
6.5
2.0
2.0
Figure 4
Figure 6
2.5
20
-55 to 150
300
260
W
mW/
o
C
o
C
o
C
o
C
UNITS
V
V
V
A
A
A
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. T
J
= 25
o
C to 125
o
C.
2. 50
o
C/W measured using FR-4 board with 0.76 in
2
footprint at 10 seconds.
3. 177
o
C/W measured using FR-4 board with 0.0115 in
2
footprint at 1000 seconds.
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
T
A
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
DSS
I
D
= 250µA, V
GS
= 0V (Figure 12)
V
DS
= 25V, V
GS
= 0V
V
DS
= 25V, V
GS
= 0V, T
A
= 150
o
C
30
-
-
-
-
-
-
-
-
1
250
±100
V
µA
µA
nA
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
I
GSS
V
GS
=
±20V
V
GS(TH)
r
DS(ON)
V
GS
= V
DS
, I
D
= 250µA (Figure 11)
I
D
= 6.5A, V
GS
= 10V (Figures 9, 10)
I
D
= 2.0A, V
GS
= 5V (Figure 9)
I
D
= 2.0A, V
GS
= 4.5V (Figure 9)
1
-
-
-
-
0.025
0.031
0.033
3
0.030
0.038
0.041
V
Ω
Ω
Ω
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Ambient
R
θJA
Pad Area = 0.76 in
2
(Note 2)
Pad Area = 0.054 in
2
(See TB337)
Pad Area = 0.0115 in
2
(See TB337)
SWITCHING SPECIFICATIONS
(V
GS
= 4.5V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 15V, I
D
≅
2.0A, R
L
= 7.5Ω,
V
GS
=
4.5V, R
GS
= 15Ω
(Figure 15)
-
-
-
-
-
-
-
16
50
28
34
-
100
-
-
-
-
91
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
50
143
177
o
C/W
o
C/W
o
C/W
©2003 Fairchild Semiconductor Corporation
HUF76113SK8 Rev. B1
HUF76113SK8
Electrical Specifications
PARAMETER
SWITCHING SPECIFICATIONS
(V
GS
= 10V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
ISS
C
OSS
C
RSS
V
DS
= 25V, V
GS
= 0V, f = 1MHz
(Figure 13)
-
-
-
585
327
73
-
-
-
pF
pF
pF
Q
g(TOT)
Q
g(5)
Q
g(TH)
Q
gs
Q
gd
V
GS
= 0V to 10V V
DD
= 15V, I
D
≅
2.0A,
R
L
= 7.5Ω
V
GS
= 0V to 5V
I
g(REF)
= 1.0mA
V
GS
= 0V to 1V
(Figures 14)
-
-
-
-
-
17.5
10
0.65
1.10
5.40
21
12
0.78
-
-
nC
nC
nC
nC
nC
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 15V, I
D
≅
6.5A, R
L
= 2.31Ω,
V
GS
=
10V, R
GS
= 16Ω
(Figure 16)
-
-
-
-
-
-
-
6.5
33
45
40
-
59
-
-
-
-
126
ns
ns
ns
ns
ns
ns
T
A
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
SYMBOL
V
SD
I
SD
=6.5A
I
SD
= 2.0A
Reverse Recovery Time
Reverse Recovered Charge
t
rr
Q
RR
I
SD
= 2.0A, dI
SD
/dt = 100A/µs
I
SD
= 2.0A, dI
SD
/dt = 100A/µs
-
-
-
-
TEST CONDITIONS
MIN
-
TYP
-
MAX
1.25
1.10
47
52
UNITS
V
V
ns
nC
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
I
D
, DRAIN CURRENT (A)
6
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
8
V
GS
= 10V, R
θ
JA
= 50
o
C/W
4
V
GS
= 4.5V, R
θ
JA
= 177
o
C/W
2
0
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
©2003 Fairchild Semiconductor Corporation
HUF76113SK8 Rev. B1
HUF76113SK8
Typical Performance Curves
(Continued)
10
THERMAL IMPEDANCE
Z
θ
JA
, NORMALIZED
1
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
R
θ
JA
= 50
o
C/W
0.1
P
DM
t
1
0.01
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θ
JA
x R
θ
JA
+ T
A
10
-2
10
-1
10
0
t, RECTANGULAR PULSE DURATION (s)
10
1
10
2
10
3
SINGLE PULSE
0.001
10
-5
10
-4
10
-3
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
500
T
C
= 25
o
C
I
DM
, PEAK CURRENT (A)
100
V
GS
= 10V
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
V
GS
= 5V
I
=
I
25
150 - T
A
125
10
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
R
θ
JA
= 50
o
C/W
1
10
-5
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (s)
10
0
10
1
10
2
10
3
FIGURE 4. PEAK CURRENT CAPABILITY
500
T
J
= MAX RATED
T
A
= 25
o
C
I
D
, DRAIN CURRENT (A)
100
100µs
100
I
AS
, AVALANCHE CURRENT (A)
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
10
STARTING T
J
= 25
o
C
10
1ms
STARTING T
J
= 150
o
C
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
1
1
10ms
V
DSS(MAX)
= 30V
100
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
1
0.01
1
10
0.1
t
AV
, TIME IN AVALANCHE (ms)
100
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
©2003 Fairchild Semiconductor Corporation
HUF76113SK8 Rev. B1
HUF76113SK8
Typical Performance Curves
30
(Continued)
30
-55
o
C
150
o
C
25
o
C
25
I
D
, DRAIN CURRENT (A)
20
V
DD
= 15V
PULSE DURATION = 80µs
25 DUTY CYCLE = 0.5% MAX
20
V
GS
= 10V
V
GS
= 5V
V
GS
= 4.5V
V
GS
= 4V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T
C
= 25
o
C
V
GS
= 3.5V
I
D,
DRAIN CURRENT (A)
15
10
5
0
0
1
2
3
4
V
GS
, GATE TO SOURCE VOLTAGE (V)
5
15
V
GS
= 3V
10
5
0
0
1
2
3
4
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
150
I
D
= 6.5A
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
I
D
= 0.5A
r
DS(ON)
, DRAIN TO SOURCE
ON RESISTANCE (mΩ)
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX
2.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
GS
= 10V, I
D
= 6.5A
100
I
D
= 2A
1.5
50
1.0
0
0
6
8
2
4
V
GS
, GATE TO SOURCE VOLTAGE (V)
10
0.5
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
1.2
1.0
NORMALIZED GATE
THRESHOLD VOLTAGE
1.0
0.9
0.8
0.7
0.6
-80
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
V
GS
= V
DS
, I
D
= 250µA
1.2
I
D
= 250µA
1.1
1.0
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
0.9
-80
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
©2003 Fairchild Semiconductor Corporation
HUF76113SK8 Rev. B1
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