HUF76105SK8
Data Sheet
January 2003
5.5A, 30V, 0.050 Ohm, N-Channel, Logic
Level UltraFET Power MOSFET
This N-Channel power MOSFET is
manufactured using the innovative
UltraFET™ process. This advanced
process technology achieves the
lowest possible on-resistance per silicon area, resulting in
outstanding performance. This device is capable of
withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators, switching
converters, motor drivers, relay drivers, low-voltage bus
switches, and power management in portable and battery-
operated products.
Formerly developmental type TA76105.
Features
• Logic Level Gate Drive
• 5.5A, 30V
• Ultra Low On-Resistance, r
DS(ON)
= 0.050Ω
• Simulation Models
- Temperature Compensated PSPICE
®
and SABER
™
Electrical Models
- SPICE and SABER Thermal Impedance Models
Available on the WEB at: www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Transient Thermal Impedance Curve vs Board Mounting
Area
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Ordering Information
PART NUMBER
HUF76105SK8
PACKAGE
MS-012AA
BRAND
76105SK8
Symbol
NC(1)
DRAIN(8)
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76105SK8T.
SOURCE(2)
DRAIN(7)
SOURCE(3)
DRAIN(6)
GATE(4)
DRAIN(5)
Packaging
JEDEC MS-012AA
BRANDING DASH
5
1
2
3
4
©2003 Fairchild Semiconductor Corporation
HUF76105SK8 Rev. B1
HUF76105SK8
Absolute Maximum Ratings
T
A
= 25
o
C, Unless Otherwise Specified
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Drain Current
Continuous (T
A
= 25
o
C, V
GS
= 10V) (Figure 2) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 100
o
C, V
GS
= 5V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
A
= 100
o
C, V
GS
= 4.5V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
30
30
±20
5.5
1.4
1.3
Figure 4
Figures 6, 17, 18
2.5
20
-55 to 150
300
260
W
mW/
o
C
o
C
o
C
o
C
V
V
V
A
A
A
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. T
J
= 25
o
C to 125
o
C.
2. 50
o
C/W measured using FR-4 board at 1 second.
3. 212
o
C/W measured using FR-4 board with 0.0115 in
2
copper pad at 1000 seconds.
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
T
A
= 25
o
C
,
Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
DSS
I
D
= 250µA, V
GS
= 0V (Figure 12)
V
DS
= 25V, V
GS
= 0V
V
DS
= 25V, V
GS
= 0V, T
C
= 150
o
C
30
-
-
-
-
-
-
-
-
1
250
±100
V
µA
µA
nA
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
I
GSS
V
GS
=
±20V
V
GS(TH)
r
DS(ON)
V
GS
= V
DS
, I
D
= 250µA (Figure 11)
I
D
= 5.5A, V
GS
= 10V (Figures 9, 10)
I
D
= 1.4A, V
GS
= 5V (Figure 9)
I
D
= 1.3A, V
GS
= 4.5V (Figure 9)
1
-
-
-
-
0.040
0.055
0.060
3
0.050
0.072
0.078
V
Ω
Ω
Ω
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Ambient
R
θJA
Pad Area = 0.76 in
2
(Note 2)
Pad Area = 0.054 in
2
(Figure 23)
Pad Area = 0.0115 in
2
(Figure 23)
SWITCHING SPECIFICATIONS
(V
GS
= 4.5V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 15V, I
D
≅
1.3A, R
L
= 11.5Ω,
V
GS
=
4.5V, R
GS
= 27Ω
(Figures 15, 21, 22)
-
-
-
-
-
-
-
12
28
31
21
-
60
-
-
-
-
80
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
50
175
212
o
C/W
o
C/W
o
C/W
©2003 Fairchild Semiconductor Corporation
HUF76105SK8 Rev. B1
HUF76105SK8
Electrical Specifications
PARAMETER
SWITCHING SPECIFICATIONS
(V
GS
= 10V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
Gate to Source Gate Charge
Reverse Transfer Capacitance
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
ISS
C
OSS
C
RSS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
(Figure 13)
-
-
-
325
180
35
-
-
-
pF
pF
pF
Q
g(TOT)
Q
g(5)
Q
g(TH)
Q
gs
Q
gd
V
GS
= 0V to 10V
V
GS
= 0V to 5V
V
GS
= 0V to 1V
V
DD
= 15V, I
D
≅
1.4A,
R
L
= 10.7Ω
I
g(REF)
= 1.0mA
(Figures 14, 19, 20)
-
-
-
-
-
9
5.3
0.35
0.8
2.5
11
6.4
0.45
-
-
nC
nC
nC
nC
nC
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 15V, I
D
≅
5.5A, R
L
= 2.7Ω,
V
GS
=
10V,
R
GS
= 27Ω
(Figures 16, 21, 22)
-
-
-
-
-
-
-
17
21
60
20
-
60
-
-
-
-
120
ns
ns
ns
ns
ns
ns
T
A
= 25
o
C
,
Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
SYMBOL
V
SD
I
SD
= 5.5A
I
SD
= 1.4A
Reverse Recovery Time
Reverse Recovered Charge
t
rr
Q
RR
I
SD
= 1.4A, dI
SD
/dt = 100A/µs
I
SD
= 1.4A, dI
SD
/dt = 100A/µs
-
-
-
-
TEST CONDITIONS
MIN
-
TYP
-
MAX
1.25
1.00
39
42
UNITS
V
V
ns
nC
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
6
5
V
GS
= 10V, R
θJA
= 50
o
C/W
4
3
2
1
0
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
V
GS
= 4.5V, R
θJA
= 212
o
C/W
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT
TEMPERATURE
©2003 Fairchild Semiconductor Corporation
I
D
, DRAIN CURRENT (A)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
HUF76105SK8 Rev. B1
HUF76105SK8
Typical Performance Curves
10
(Continued)
THERMAL IMPEDANCE
Z
θJA
, NORMALIZED
1
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
P
DM
R
θJA
= 50
o
C/W
0.1
t
1
0.01
SINGLE PULSE
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJA
x R
θJA
+ T
A
10
-2
10
-1
10
0
10
1
10
2
10
3
0.001
10
-5
10
-4
10
-3
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
500
R
θJA
= 50
o
C/W
T
C
= 25
o
C
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I
DM
, PEAK CURRENT (A)
100
V
GS
= 10V
10
V
GS
= 5V
I = I
25
150 - T
A
125
1
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (s)
10
0
10
1
10
2
10
3
10
-5
FIGURE 4. PEAK CURRENT CAPABILITY
200
100
I
D
, DRAIN CURRENT (A)
20
I
AS
, AVALANCHE CURRENT (A)
T
J
= MAX RATED
T
A
= 25
o
C
100µs
STARTING T
J
= 25
o
C
10
10
1ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
ds(ON)
STARTING T
J
= 150
o
C
1
10ms
BV
DSS MAX
= 30V
0.1
1
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
100
1
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
0.1
1
10
0.01
t
AV
, TIME IN AVALANCHE (ms)
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
©2003 Fairchild Semiconductor Corporation
HUF76105SK8 Rev. B1
HUF76105SK8
Typical Performance Curves
25
(Continued)
I
D,
DRAIN CURRENT (A)
I
D
, DRAIN CURRENT (A)
20
250µs PULSE TEST
DUTY CYCLE = 0.5% MAX
V
DD
= 15V
25
-55
o
C
25
o
C
20
150
o
C
V
GS
= 10V
V
GS
= 5V
V
GS
= 4V
15
15
10
10
V
GS
= 3V
T
A
= 25
o
C
V
GS
= 3.5V
250µs PULSE TEST
DUTY CYCLE = 0.5% MAX
5
5
5
0
0
1
2
3
4
V
GS
, GATE TO SOURCE VOLTAGE (V)
5
0
0
1
2
3
4
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
110
I
D
= 5.5A
r
DS(ON)
, DRAIN TO SOURCE
ON RESISTANCE (mΩ)
90
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
250µs PULSE TEST
DUTY CYCLE = 0.5% MAX
1.8
250µs PULSE TEST
DUTY CYCLE = 0.5% MAX
1.6
1.4
1.2
1.0
0.8
0.6
V
GS
= 10V, I
D
= 5.5A
70
I
D
= 1.4A
50
30
2
4
6
8
V
GS
, GATE TO SOURCE VOLTAGE (V)
10
-80
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
1.2
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
V
GS
= V
DS
, I
D
= 250µA
NORMALIZED GATE
THRESHOLD VOLTAGE
1.1
1.15
I
D
= 250µA
1.1
1.0
1.05
0.9
1.0
0.8
0.95
0.7
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
0.9
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
©2003 Fairchild Semiconductor Corporation
HUF76105SK8 Rev. B1
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