HUF75852G3
Data Sheet
December 2001
75A, 150V, 0.016 Ohm, N-Channel,
UltraFET® Power MOSFET
Packaging
JEDEC TO-247
SOURCE
DRAIN
GATE
Features
• Ultra Low On-Resistance
- r
DS(ON)
= 0.016Ω, V
GS
=
10V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
DRAIN
(TAB)
Symbol
D
Ordering Information
PART NUMBER
HUF75852G3
G
PACKAGE
TO-247
BRAND
75852G
S
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
HUF75852G3
UNITS
V
V
V
A
A
150
150
±20
75
75
Figure 4
Figures 6, 14, 15
500
3.33
-55 to 175
300
260
W
W/
o
C
o
C
o
C
o
C
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Drain Current
Continuous (T
C
= 25
o
C, V
GS
= 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
C
= 100
o
C, V
GS
= 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
NOTE:
1. T
J
= 25
o
C to 150
o
C.
CAUTION:
Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation
HUF75852G3 Rev. B
HUF75852G3
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
DSS
I
D
= 250µA, V
GS
= 0V (Figure 11)
V
DS
= 140V, V
GS
= 0V
V
DS
= 135V, V
GS
= 0V, T
C
= 150
o
C
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case
Thermal Resistance Junction to
Ambient
R
θJC
R
θJA
TO-247
-
-
-
-
0.30
30
o
C/W
o
C/W
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
150
-
-
-
-
-
-
-
-
1
250
±100
V
µA
µA
nA
I
GSS
V
GS
=
±20V
V
GS(TH)
r
DS(ON)
V
GS
= V
DS
, I
D
= 250µA (Figure 10)
I
D
= 75A, V
GS
= 10V (Figure 9)
2
-
-
0.013
4
0.016
V
¾
SWITCHING SPECIFICATIONS
(V
GS
= 10V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
ISS
C
OSS
C
RSS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
(Figure 12)
-
-
-
7690
1650
535
-
-
-
pF
pF
pF
Q
g(TOT)
Q
g(10)
Q
g(TH)
Q
gs
Q
gd
V
GS
= 0V to 20V
V
GS
= 0V to 10V
V
GS
= 0V to 2V
V
DD
= 75V,
I
D
= 75A,
I
g(REF)
= 1.0mA
(Figures 13, 16, 17)
-
-
-
-
-
400
215
15
25
66
480
260
17.5
-
-
nC
nC
nC
nC
nC
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 75V, I
D
= 75A
V
GS
=
10V,
R
GS
= 2.0Ω
(Figures 18, 19)
-
-
-
-
-
-
-
22
151
82
107
-
260
-
-
-
-
285
ns
ns
ns
ns
ns
ns
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
SYMBOL
V
SD
I
SD
= 75A
I
SD
= 35A
Reverse Recovery Time
Reverse Recovered Charge
t
rr
Q
RR
I
SD
= 75A, dI
SD
/dt = 100A/µs
I
SD
= 75A, dI
SD
/dt = 100A/µs
TEST CONDITIONS
MIN
-
-
-
-
TYP
-
-
-
-
MAX
1.25
1.00
260
1830
UNITS
V
V
ns
nC
©2001 Fairchild Semiconductor Corporation
HUF75852G3 Rev. B
HUF75852G3
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
175
T
C
, CASE TEMPERATURE (
o
C)
0
25
50
75
100
125
150
175
T
C
, CASE TEMPERATURE (
o
C)
80
I
D
, DRAIN CURRENT (A)
60
V
GS
= 10V
40
20
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
2
1
THERMAL IMPEDANCE
Z
θJC
, NORMALIZED
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
0.1
P
DM
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJC
x R
θJC
+ T
C
10
-3
10
-2
t, RECTANGULAR PULSE DURATION (s)
10
-1
10
0
SINGLE PULSE
0.01
10
-5
10
-4
t
1
t
2
10
1
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
2000
T
C
= 25
o
C
I
DM
, PEAK CURRENT (A)
1000
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I = I
25
V
GS
= 10V
175 - T
C
150
100
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
-4
10
-3
10
-2
t, PULSE WIDTH (s)
10
-1
10
0
10
1
50
10
-5
FIGURE 4. PEAK CURRENT CAPABILIT Y
©2001 Fairchild Semiconductor Corporation
HUF75852G3 Rev. B
HUF75852G3
Typical Performance Curves
1000
I
AS
, AVALANCHE CURRENT (A)
(Continued)
1000
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
I
D
, DRAIN CURRENT (A)
100
100µs
100
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
10
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
1ms
10ms
1
1
10
SINGLE PULSE
T
J
= MAX RATED
T
C
= 25
o
C
100
10
0.01
500
1
t
AV
, TIME IN AVALANCHE (ms)
0.1
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
200
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DD
= 15V
150
200
V
GS
= 20V
I
D
, DRAIN CURRENT (A)
150
V
GS
= 10V
V
GS
= 7V
V
GS
= 6V
V
GS
=5V
100
I
D
, DRAIN CURRENT (A)
100
T
J
= 175
o
C
50
T
J
= 25
o
C
50
0
2
3
4
T
J
= -55
o
C
5
6
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T
C
= 25
o
C
0
1
2
3
4
5
6
0
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
2.8
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
2.2
NORMALIZED GATE
THRESHOLD VOLTAGE
1.2
V
GS
= V
DS
, I
D
= 250µA
1.0
1.6
0.8
1.0
V
GS
= 10V, I
D
= 75A
0.4
-80
-40
0
40
80
120
160
200
0.6
0.4
-80
-40
0
40
80
120
160
200
T
J
, JUNCTION TEMPERATURE (
o
C)
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
©2001 Fairchild Semiconductor Corporation
HUF75852G3 Rev. B
HUF75852G3
Typical Performance Curves
1.2
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
I
D
= 250µA
10000
C, CAPACITANCE (pF)
C
RSS
=
C
GD
(Continued)
20000
C
ISS
=
C
GS
+ C
GD
1.1
1000
1.0
C
OSS
≅
C
DS
+ C
GD
V
GS
= 0V, f = 1MHz
0.9
-80
-40
0
40
80
120
160
200
100
0.1
1.0
10
100
T
J
, JUNCTION TEMPERATURE (
o
C)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
DD
= 75V
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
I
D
= 75A
I
D
= 30A
0
50
100
150
Q
g
, GATE CHARGE (nC)
200
250
2
0
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
©2001 Fairchild Semiconductor Corporation
HUF75852G3 Rev. B
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