LTC1430A
High Power Step-Down
Switching Regulator Controller
FEATURES
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DESCRIPTIO
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High Power 5V to 1.xV-3.xV Switching Controller:
Can Exceed 10A Output
Maximum Duty Cycle > 90% Permits 3.3V to 2.xV
Conversion Using a Low Power 5V Supply
All N-Channel External MOSFETs
Fixed Frequency Operation—Small L
Excellent Output Regulation:
±1%
Over Line, Load
and Temperature Variations
High Efficiency: Over 95% Possible
No Low Value Sense Resistor Needed
Outputs Can Drive External FETs with Up to
10,000pF Gate Capacitance
Quiescent Current: 350µA Typ, 1µA in Shutdown
Fast Transient Response
Adjustable or Fixed 3.3V Output
Available in 8-Lead SO and 16-Lead GN
and SO Packages
The LTC
®
1430A is a high power, high efficiency switching
regulator controller optimized for 5V to 1.xV-3.xV applica-
tions. It includes a precision internal reference and an inter-
nal feedback system that can provide output regulation of
±1%
over temperature, load current and line voltage shifts.
The LTC1430A uses a synchronous switching architecture
with two N-channel output devices, eliminating the need for
a high power, high cost P-channel device. Additionally, it
senses output current across the drain-source resistance
of the upper N-channel FET, providing an adjustable cur-
rent limit without an external low value sense resistor.
The LTC1430A includes a fixed frequency PWM oscillator
for low output ripple under virtually all operating condi-
tions. The 200kHz free-running clock frequency can be
externally adjusted from 100kHz to above 500kHz. The
LTC1430A’s maximum duty cycle is typically 93.5% com-
pared to 88% for the LTC1430. This permits 3.3V to 2.xV
conversion using a low power 5V supply. The LTC1430A
features low 350µA quiescent current, allowing greater
than 90% efficiency operation in converter designs from
1A to greater than 50A output current. Shutdown mode
drops the LTC1430A supply current to 1µA.
For new
designs, refer to the LTC3830.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Pentium is a registered trademark of Intel Corporation.
AMD-K6 is a registered trademark of Advanced Micro Devices, Inc.
APPLICATI
s
s
s
s
S
Power Supply for Pentium
®
II and AMD-K6
®
Microprocessors
High Power 5V to 3.xV Regulators
Local Regulation for Dual Voltage Logic Boards
Low Voltage, High Current Battery Regulation
TYPICAL APPLICATI
5V
Typical 5V to 3.3V, 10A Application
100
+
100Ω
1µF
PV
CC2
MBR0530T1
PV
CC1
G1
I
MAX
LTC1430A I
FB
FREQSET
SHDN
COMP
G2
PGND
GND
SENSE
+
SENSE
–
FB
NC
0.1µF
1k
16k
0.1µF
+
C
IN
220µF
×4
EFFICIENCY (%)
+
4.7µF
0.1µF
0.01µF
NC
SHUTDOWN
C1
220pF
V
CC
SS
Q1A, Q1B
2 IN PARALLEL
2.7µH/15A
Q2
+
C
OUT
330µF
×6
3.3V
10A
R
C
7.5k
C
C
4700pF
1430 TA01
Q1A, Q1B, Q2: MOTOROLA MTD20N03HL
C
IN
: AVX-TPSE227M010R0100
C
OUT
: AVX-TPSE337M006R0100
U
Efficiency
90
80
70
60
50
40
0.1
T
A
= 25°C
PV
CC
= 5V
V
OUT
= 3.3V
1
LOAD CURRENT (A)
10
1430 TA02
UO
UO
1
LTC1430A
ABSOLUTE
AXI U
RATI GS
Supply Voltage
V
CC
....................................................................... 9V
PV
CC1, 2
.............................................................. 13V
Input Voltage
I
FB
......................................................... – 0.3V to 18V
All Other Inputs ...................... – 0.3V to (V
CC
+ 0.3V)
PACKAGE/ORDER I FOR ATIO
ORDER
PART NUMBER
G1
1
2
3
4
5
6
7
8
TOP VIEW
G1 1
PV
CC1
2
GND 3
FB 4
8
7
6
5
G2
V
CC
/PV
CC2
COMP
SHDN
LTC1430ACS8
S8 PACKAGE
8-LEAD PLASTIC SO
S8 PART MARKING
1430A
T
JMAX
= 150°C,
θ
JA
= 150°C/W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
V
CC
= 5V, T
A
= 25°C (Note 2) unless otherwise noted.
SYMBOL
V
CC
PV
CC
V
OUT
V
FB
∆V
OUT
I
VCC
I
PVCC
f
OSC
PARAMETER
Supply Voltage
PV
CC1
, PV
CC2
Voltage
Output Voltage
Feedback Voltage
Output Load Regulation
Output Line Regulation
Supply Current (V
CC
Only)
Supply Current (PV
CC
)
Internal Oscillator Frequency
Figure 1
SENSE
+
and SENSE
–
Floating ,
V
COMP
= 2.5V
Figure 1, I
OUT
= 0A to 10A
Figure 1, V
CC
= 4.75V to 5.25V
Figure 2, V
SHDN
= V
CC
V
SHDN
= 0V
Figure 2, PV
CC
= 5V, V
SHDN
= V
CC
(Note 3)
V
SHDN
= 0V
FREQSET Floating
q
q
q
CONDITIONS
q
q
2
U
U
W
W W
U
W
(Note 1)
Junction Temperature ........................................... 150°C
Operating Temperature Range
LTC1430AC ............................................. 0°C to 70°C
LTC1430AI ........................................ – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
TOP VIEW
16 G2
15 PV
CC2
14 V
CC
13 I
FB
12 I
MAX
11 FREQSET
10 COMP
9
SS
ORDER
PART NUMBER
LTC1430ACGN
LTC1430AIGN
LTC1430ACS
PV
CC1
PGND
GND
SENSE
–
FB
SENSE
+
SHDN
GN PACKAGE
16-LEAD PLASTIC SSOP
S PACKAGE
16-LEAD PLASTIC SO
T
JMAX
= 150°C,
θ
JA
= 130°C/W (GN)
T
JMAX
= 150°C,
θ
JA
= 110°C/W (S)
LTC1430AC
MIN TYP MAX
4
3
3.30
1.25 1.265 1.28
5
1
350
1
1.5
0.1
140
200
260
700
10
8
13
LTC1430AI
MIN TYP MAX
4
3
3.30
1.23 1.265 1.29
5
1
350
1
1.5
0.1
130
200
300
700
10
8
13
UNITS
V
V
V
V
mV
mV
µA
µA
mA
µA
kHz
LTC1430A
ELECTRICAL CHARACTERISTICS
V
CC
= 5V, T
A
= 25°C (Note 2) unless otherwise noted.
SYMBOL
V
IH
V
IL
I
IN
g
mV
g
mI
A
V
I
MAX
I
SS
t
r
, t
s
t
NOV
DC
MAX
PARAMETER
SHDN Input High Voltage
SHDN Input Low Voltage
SHDN Input Current
Error Amplifier Transconductance
I
LIM
Amplifier Transconductance
Error Amplifier Open-Loop Gain
I
MAX
Sink Current
Soft Start Source Current
Driver Rise/Fall Time
Driver Non-Overlap Time
Maximum Duty Cycle
(Note 4)
(Note 5)
V
I(MAX)
= V
CC
V
SS
= 0V
Figure 3, PV
CC1
= PV
CC2
= 5V
Figure 3, PV
CC1
= PV
CC2
= 5V
Figure 3, V
COMP
= V
CC
,
V
FB
= 1.265V
q
q
q
q
CONDITIONS
q
q
q
q
LTC1430AC
MIN TYP MAX
2.4
0.8
±0.1
350
40
8
–8
25
90
650
2400
48
12
– 12
80
130
93.5
16
– 16
250
250
±1
1100
LTC1430AI
MIN TYP MAX
2.4
0.8
±0.1
300
40
8
–8
25
89
650
2400
48
12
– 12
80
130
93.5
17
– 17
250
250
±1
1200
UNITS
V
V
µA
µmho
µmho
dB
µA
µA
ns
ns
%
The
q
denotes specifications which apply over the full operating
temperature range.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 3:
Supply current in normal operation is dominated by the current
needed to charge and discharge the external FET gates. This will vary with
the LTC1430A operating frequency, operating voltage and the external
FETs used.
Note 4:
The I
LIM
amplifier can sink but cannot source current. Under
normal (not current limited) operation, the I
LIM
output current will be zero.
Note 5:
The open-loop DC gain and transconductance from the FB pin
(SENSE
+
and SENSE
–
floating) to COMP pin will be A
V
and gm
V
respectively.
3
LTC1430A
TYPICAL PERFOR A CE CHARACTERISTICS
I
MAX
Pin Sink Current
vs Temperature
14.0
13.5
I
MAX
CURRENT (µA)
13.0
12.5
12.0
11.5
11.0
10.5
– 40 –20
V
CC
= 5V
OSCILLATOR FREQUENCY (kHz)
240
230
220
210
200
190
180
170
– 40 –20
DUTY CYCLE (%)
40
20
60
0
TEMPERATURE (°C)
Error Amplifier Transconductance
vs Temperature
850
800
g
m
=
∆I
COMP
∆V
FB
TRANSCONDUCTANCE (µmho)
750
700
∆V
FB
(mV)
650
600
550
500
450
400
350
– 40
– 20
20
0
60
40
TEMPERATURE (°C)
80
100
2
0
–2
–4
–6
–8
–10
– 40 – 20
0
60
40
20
TEMPERATURE (°C)
80
100
1430 G05
∆V
OUT
(mV)
Output Voltage vs Load Current
with Current Limit
4.0
3.5
SUPPLY CURRENT (mA)
OUTPUT VOLTAGE (V)
3.0
2.5
2.0
R
I(MAX)
= 10k
1.5
1.0
T
A
= 25°C
0.5 V = 5V
CC
FIGURE 4
0
2
0
R
I(MAX)
= 16k
4
U W
80
1430 G01
1430 G04
Oscillator Frequency
vs Temperature
V
CC
= 5V
FREQSET FLOATING
100
95
90
85
80
75
Maximum Duty Cycle
vs Temperature
V
COMP
= V
CC
V
FB
= 1.265V
100
40
20
60
0
TEMPERATURE (°C)
80
100
70
– 40
– 20
20
0
60
40
TEMPERATURE (°C)
80
100
1430 G02
1430 G03
∆V
FB
vs Temperature
10
8
6
4
V
CC
= 5V
0.4
0.2
0
– 0.2
– 0.4
– 0.6
– 0.8
–1.0
Load Regulation
T
A
= 25°C
V
OUT
= 3.3V
V
CC
= 5V
FIGURE 4
0
1
2
3 4 5 6 7
LOAD CURRENT (A)
8
9
10
1460 G06
Supply Current
vs Oscillator Frequency
1000
T
A
= 25°C
V
CC
= 5V
FIGURE 4
IPV
CC
(LOADED
WITH 10,000pF,
PV
CC
= 12V)
100
10
IPV
CC
(NO LOAD,
PV
CC
= 12V)
IPV
CC
(NO LOAD,
PV
CC
= 5V)
1
IV
CC
0.1
0
8
6
LOAD CURRENT (A)
4
10
12
1430 G07
100
200
300
400
OSCILLATOR FREQUENCY (kHz)
500
1430 G08
LTC1430A
PI FU CTIO S
G1 (Pin 1/Pin 1):
Driver Output 1. Connect this pin to the
gate of the upper N-channel MOSFET, Q1. This output will
swing from PV
CC1
to PGND. It will always be low when G2
is high.
PV
CC1
(Pin 2/Pin 2):
Power V
CC
for Driver 1. This is the
power supply input for G1. G1 will swing from PGND to
PV
CC1
. PV
CC1
must be connected to a potential of at least
PV
CC
+ V
GS(ON)
(Q1). This potential can be generated using
an external supply or a simple charge pump connected to
the switching node between the upper MOSFET and the
lower MOSFET; see Applications Information for details.
PGND (Pin 3/Pin 3):
Power Ground. Both drivers return to
this pin. It should be connected to a low impedance ground
in close proximity to the source of Q2. 8-lead parts have
PGND and GND tied together at Pin 3.
GND (Pin 4/Pin 3):
Signal Ground. All low power internal
circuitry returns to this pin. To minimize regulation errors
due to ground currents, GND should be connected to
PGND right at the LTC1430A. 8-lead parts have PGND and
GND tied together internally at Pin 3.
SENSE
–
, FB, SENSE
+
(Pins 5, 6, 7/Pin 4):
These three
pins connect to the internal resistor divider and to the
internal feedback node. To use the internal divider to set
the output voltage to 3.3V, connect SENSE
+
to the positive
terminal of the output capacitor and SENSE
–
to GND. FB
should be left floating in applications that use the internal
divider. To use an external resistor divider to set the output
voltage, float SENSE
+
and SENSE
–
and connect the exter-
nal resistor divider to FB.
SHDN (Pin 8/Pin 5):
Shutdown. A TTL compatible low
level at SHDN for longer than 50µs puts the LTC1430A into
shutdown mode. In shutdown, G1 and G2 go low, all
internal circuits are disabled and the quiescent current
drops to 10µA max. A TTL compatible high level at SHDN
allows the part to operate normally.
SS (Pin 9/NA):
Soft Start. The SS pin allows an external
capacitor to be connected to implement a soft start func-
tion. An external capacitor from SS to ground controls the
start-up time and also compensates the current limit loop,
allowing the LTC1430A to enter and exit current limit
cleanly. See Applications Information for more details.
U
U
U
(16-Lead Package/8-Lead Package)
COMP (Pin 10/Pin 6):
External Compensation. The COMP
pin is connected directly to the output of the error amplifier
and the input of the PWM. An RC network is used at this
node to compensate the feedback loop to provide opti-
mum transient response. See Applications Information for
compensation details.
FREQSET (Pin 11/NA):
Frequency Set. This pin is used to
set the free running frequency of the internal oscillator.
With the pin floating, the oscillator runs at about 200kHz.
A resistor from FREQSET to ground will speed up the
oscillator; a resistor to V
CC
will slow it down. See Applica-
tions Information for resistor selection details.
I
MAX
(Pin 12/NA):
Current Limit Set. I
MAX
sets the thresh-
old for the internal current limit comparator. If I
FB
drops
below I
MAX
with G1 on, the LTC1430A will go into current
limit. I
MAX
has a 12µA pull-down to GND. It can be adjusted
with an external resistor to PV
CC
or an external voltage
source.
I
FB
(Pin 13/NA):
Current Limit Sense. Connect to the
switched node at the source of Q1 and the drain of Q2
through a 1k resistor. The 1k resistor is required to prevent
voltage transients from damaging I
FB
. This pin can be
taken up to 18V above GND without damage.
V
CC
(Pin 14/Pin 7):
Power Supply. All low power internal
circuits draw their supply from this pin. Connect to a clean
power supply, separate from the main PV
CC
supply at the
drain of Q1. This pin requires a 4.7µF or greater bypass
capacitor. 8-lead parts have V
CC
and PV
CC2
tied together
at Pin 7 and require at least a 10µF bypass to GND.
PV
CC2
(Pin 15/Pin 7):
Power V
CC
for Driver 2. This is the
power supply input for G2. G2 will swing from GND to
PV
CC2
. PV
CC2
is usually connected to the main high power
supply. 8-lead parts have V
CC
and PV
CC2
tied together at
Pin 7 and require at least a 10µF bypass to GND.
G2 (Pin 16/Pin 8):
Driver Output 2. Connect this pin to the
gate of the lower N-channel MOSFET, Q2. This output will
swing from PV
CC2
to PGND. It will always be low when G1
is high.
5
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