Final Electrical Specifications
LT1567
1.4nV/√Hz 175MHz Op Amp
and Inverter / Filter Building Block
August 2001
FEATURES
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s
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DESCRIPTIO
Single-Ended to Differential Conversion
Low Noise: 1.4nV/√Hz
20µV
RMS
Total Wideband Noise Filter with 2MHz f
C
Dynamic Range: 104dB SNR at
±5V
Supply Voltage 2.7V to 12V Total
Rail-to-Rail Outputs
DC Accurate: Op Amp V
OS
1mV (Typ)
Trimmed Bandwidth for Accurate Filters
MSOP-8 Surface-Mount Package
No External Clock Required
The LT
®
1567 is an analog building block optimized for
very low-noise high-frequency filter applications. It con-
tains two wideband operational amplifiers, one of them
internally configured as a unity-gain inverter. With the
addition of two capacitors, the LT1567 becomes a flexible
second-order filter section with cutoff frequency (f
C
) up to
5MHz, ideal for antialiasing or for channel filtering in high-
speed data communications systems.
In addition to low noise and high speed LT1567 features
single-ended to differential conversion for direct driving of
high speed A/D converters. The LT1567 operates from a
total power-supply voltage of 2.7V to 12V and can support
signal-to-noise ratios above 100dB.
The LT1567 is available in an 8-lead MSOP package.
APPLICATIO S
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Low Noise, High Speed Filters to 5MHz
Cellular Base Stations
Communication Channel or Roofing Filters
Antialias or Reconstruction Filtering
Video Signal Processing
Single-Ended to Differential Conversion
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
2MHz 3-Pole Antialias Filter with
Single-Ended to Differential Conversion
V
+
536Ω
270pF
1
2
270pF
0.1µF
3
4
0.1µF
LT1567
8
7
6
5
270pF
+A
IN
ADC
–A
IN
147Ω
LTC1420
GAIN (dB)
12
0.1µF
6
0
536Ω
V
IN
536Ω
147Ω
–6
–12
–18
–24
NOTE: THIS IS RESPONSE FROM
SINGLE-ENDED V
IN
TO DIFFERENTIAL
–30
VOLTAGE ACROSS ADC INPUT,
SO THERE IS A BUILT-IN 6dB GAIN.
–36
100
1M
FREQUENCY (Hz)
V
–
96dB DIFFERENTIAL SNR AT 3V TOTAL SUPPLY.
1567 TA01
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Frequency Response
10M
1567 TA01a
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1
LT1567
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
OAOUT
OAIN
BYPASS
V
–
1
2
3
4
8
7
6
5
V
+
INVOUT
INVIN
GND
Total Supply Voltage (V
+
to V
–
) ............................ 12.6V
Input Voltage (Note 2) .............................................
±V
S
Input Current (Note 2) ..........................................
±5mA
Operating Temperature Range ..................... 0°C to 70°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
LT1567CMS8
MS8 PART
MARKING
LTWH
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 40°C,
θ
JA
= 160°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
q
denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
S
=
±2.5V,
R
L
= 1K, V
OUT
= 0 both amplifiers unless otherwise noted.
PARAMETER
Total Supply Voltage
Supply Current
V
S
=
±1.5V
V
S
=
±2.5V
V
S
=
±5V
V
S
=
±1.5V,
R
L
= 1k
V
S
=
±2.5V,
R
L
= 1k
V
S
=
±2.5V,
R
L
=100
V
S
=
±5V,
R
L
= 1k
V
S
=
±1.5V,
R
L
= 1k
V
S
=
±2.5V,
R
L
= 1k
V
S
=
±2.5V,
R
L
=100
V
S
=
±5V,
R
L
= 1k
V
S
=
±1.5V,
R
L
= 1k
V
S
=
±2.5V,
R
L
= 1k
V
S
=
±5V,
R
L
= 1k
V
S
=
±1.5V,
R
L
= 1k
V
S
=
±2.5V,
R
L
= 1k
V
S
=
±5V,
R
L
= 1k
V
S
=
±1.5V
V
S
=
±5V
V
S
=
±1.5V,
V
CM
= –0.25V to 0.25V
V
S
=
±5V,
V
CM
= –2.5V to 2.5V
V
S
=
±1.5V
to
±5V,
V
CM
= 0V
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
2.7
TYP
8.5
9
11
MAX
12
15
16
19
UNITS
V
mA
mA
mA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OA Output Positive Voltage Swing
1.30
2.20
2.00
4.70
–1.30
–2.20
–2.00
–4.70
1.30
2.20
4.60
–1.30
–2.20
–4.50
–0.25
–2.5
90
75
80
1.45
2.40
2.25
4.85
–1.45
–2.44
–2.20
–4.90
1.40
2.40
4.90
–1.40
–2.40
–4.80
0.25
2.5
90
100
1
6
3
9
OA Output Negative Voltage Swing
INV Output Positive Voltage Swing
INV Output Negative Voltage Swing
Common Mode (GND) Input Voltage Range
(See Pin Functions)
DC Common Mode Rejection Ratio (CMRR)
DC Power-Supply Rejection Ratio (PSRR)
OA Input Offset Voltage Magnitude
INV Output Offset Voltage Magnitude
2
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V
V
dB
dB
dB
mV
mV
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LT1567
The
q
denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
S
=
±2.5V,
R
L
= 1K, V
OUT
= 0 both amplifiers unless otherwise noted.
PARAMETER
OA Input Bias Current
GND Input Bias Current
OA DC Open-Loop Gain
V
S
=
±1.5V,
R
L
= 1k, V
O
= –1V to 1V
V
S
=
±2.5V,
R
L
= 1k, V
O
= –2V to 2V
V
S
=
±2.5V,
R
L
= 100, V
O
= –1.5V to 1.5V
V
S
=
±5V,
R
L
= 1k, V
O
= –4V to 4V
V
S
=
±1.5V,
R
L
= 1k, V
IN
= –1V to 1V
V
S
=
±2.5V,
R
L
= 1k, V
IN
= –2V to 2V
V
S
=
±2.5V,
R
L
= 100, V
IN
= –1.5V to 1.5V
V
S
=
±5V,
R
L
= 1k, V
IN
= –4V to 4V
V
S
=
±2.5V,
R
L
= 1k, V
IN
= –2V to 2V
Measured at 2MHz, V
S
=
±1.5V
Measured at 2MHz, V
S
=
±2.5V
Measured at 2MHz, V
S
=
±5V
Measured at 2MHz
f = 100kHz
f = 100kHz
f
C
= 2MHz, BW = 4MHz
f
C
= 5MHz, BW = 10MHz
f = 1MHz, f
C
= 2MHz, V
OUT
= 1V
RMS
f = 2.5MHz, f
C
= 5MHz, V
OUT
= 1V
RMS
f = 100kHz, OA Connected as
Unity-Gain Inverter
CONDITIONS
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
ELECTRICAL CHARACTERISTICS
MIN
TYP
3
6
MAX
10
15
UNITS
µA
µA
V/mV
V/mV
V/mV
V/mV
7.5
10
1.2
15
0.97
0.97
0.97
0.97
450
100
110
120
0.96
23
35
4.0
40
1.04
1.04
1.04
1.04
600
160
175
190
1.0
49
1.4
1.0
20
30
–88
–70
35
0.1
1.05
750
INV DC Gain Magnitude
V/V
V/V
V/V
V/V
Ω
MHz
MHz
MHz
V/V
V/µsec
nV/√Hz
pA/√Hz
µV
RMS
µV
RMS
dB
dB
mA
Ω
INV DC Input Resistance
OA Gain-Bandwidth Product
INV AC Gain Magnitude
OA Slew Rate Magnitude
OA Input Voltage Noise Density
OA Input Current Noise Density
Wideband Output Noise for a Second-Order Filter (Figure 1)
Total Harmonic Distortion (THD)
for a Second-Order Filter (Figure 1)
Output Short-Circuit Current (Either Output)
Output Impedance
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The inputs of each op amp are protected by back-to-back diodes.
If either differential input voltage exceeds 1.4V, the input current should be
limited to less than 5mA.
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LT1567
PI FU CTIO S
OAOUT (Pin 1):
Output of the Uncommitted Op Amp (OA).
As with most wideband op amps, it is important to avoid
connecting heavy capacitive loads (above about 10pF)
directly to this output. Such loads, exhibiting low imped-
ance (circa 100Ω) at the op amp’s unity-gain crossover
frequency (circa 100MHz), will impair AC stability.
OAIN (Pin 2):
Inverting or “–” Input of the Uncommitted
Op Amp (OA) in the LT1567. The noninverting or “+” input
of this amplifier is shared with that of the INV amplifier and
accessed via the GND and BYPASS pins. The OA amplifier
is optimized for minimal wideband noise.
BYPASS (Pin 3):
AC Ground Bypass. Designed for a
decoupling capacitor, typically 0.1µF, to a printed circuit
ground plane using the shortest possible wiring. Use GND
for DC connection of the amplifier noninverting inputs as
described in the GND (Pin 5) description.
Power Supply Pins (Pins 4, 8):
The V
–
and V
+
pins should
be bypassed with 0.1µF capacitors to an adequate analog
ground plane using the shortest possible wiring. Electri-
cally clean supplies and a low impedance ground are
important for the high dynamic range and bandwidth
available from the LT1567. Low noise linear power sup-
plies are recommended. Switching supplies are not rec-
ommended because of the inevitable risk of their switch-
ing noise coupling into the signal path, reducing dynamic
range.
GND (Pin 5):
DC Ground Input. Sets the noninverting
inputs for the two internal amplifiers; designed for use as
a DC reference, not a signal input.The GND input includes
a small series resistor, both to balance DC offsets in the
presence of input bias currents and also to suppress the
“Q” factor of possible parasitic high-frequency resonant
circuits introduced by wiring inductance. The on-chip
ground reference at the noninverting inputs of the two
amplifiers is decoupled for very high frequencies with a
small internal capacitor to the chip substrate, nominally
7pF. An external capacitor, typically 0.1µF, to a nearby
ground plane should be added at the BYPASS pin for a
clean wideband ground reference.
INVIN (Pin 6):
Unity-Gain Inverter Input. The “inverter”
(INV) amplifier in the LT1567 is connected to internal
resistors (nominally 600Ω each) to form a closed-loop
amplifier with a wideband voltage gain of nominally –1.
The amplifier in this position is similar to the uncommitted
op amp (OA) but is optimized for high frequency linearity.
INVOUT (Pin 7):
Output of the INV or “Inverter” Amplifier,
with a Nominal Gain of –1 from the INVIN Pin. As with
most wideband op amps, it is important to avoid connect-
ing heavy capacitive loads (above about 10pF) directly to
this output. Such loads, exhibiting low impedance (circa
100 ohms) at the op amp’s unity-gain crossover frequency
(circa 100MHz), will impair AC stability.
BLOCK DIAGRA
BYPASS
V
–
3
7pF
4
150Ω
4
–
OAIN
2
+
–
OAOUT
1
+
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Block Diagram with Top View of Pins
8
7
600Ω
600Ω
6
5
V
+
INVOUT
INVIN
GND
LT1567
APPLICATIO S I FOR ATIO
Functional Description
The LT1567 contains two low-noise wideband operational
amplifiers, one of them connected internally as a unity-
gain inverter. These two amplifiers can form a second-
order multiple-feedback filter configuration (Figure 1) for
megahertz signal frequencies, with exceptionally low total
noise. The amplifier in the dedicated inverter (INV) is
optimized for better high frequency linearity while the
uncommitted operational amplifier (OA) is optimized for
lower input noise voltage, according to the different
sensitivities to these effects in the filter section. This
combination produces a low-noise filter with better distor-
tion performance than would be possible with identical
amplifiers.
Signal Ground
Both operational amplifiers within the LT1567 are de-
signed for inverting operation (constant common mode
input) and they share a single ground reference node on
the chip. Two pins permit access to this node: GND and
BYPASS. For a clean on-chip ground reference over a wide
bandwidth, the normal procedure is to connect GND to a
DC ground potential and BYPASS to a decoupling capaci-
tor that returns to a ground plane.
Differential Output Feature
The multiple-feedback filter section of Figure 1 inherently
includes two outputs of opposite signal polarity: a DC-
inverting output from the OA (Pin 1) and a DC noninverting
output from the INV block (Pin 7). These two outputs
maintain equal gain and 180º phase shift over a wide
frequency range. This feature permits choosing the signal
polarity in single-ended applications, and also performs
single-ended-to-differential conversion. The latter prop-
erty is useful in an antialias filter to drive standard mono-
lithic A/D converters having differential inputs, as illus-
trated on page 1.
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Dealing with High Source Impedances
The voltage V
IN
in Figure 1 , on the left side of R1, is the
signal voltage that the filter sees. If a voltage source with
significant internal impedance drives the V
IN
node in
Figure 1, then the filter input V
IN
may differ from the
source’s open-circuit output, and the difference can be
complex, because the filter presents a complex imped-
ance to V
IN
. A rule of thumb is that a source impedance is
negligibly “low” if it is much smaller than R1 at frequencies
of interest. Otherwise, the source impedance (resistive or
reactive) effectively adds to R1 and may change the signal
frequency response compared to that with a low source
impedance. If the source is resistive and predictable, then
it may be possible to design for it by reducing R1.
Unpredictable or nonresistive source impedances that are
not well below R1 should be buffered.
Construction and Instrumentation Cautions
Electrically clean construction is important in applications
seeking the full dynamic range and bandwidth of the
LT1567. Using the shortest possible wiring or printed-
circuit paths will minimize parasitic capacitance and in-
ductance. High quality supply bypass capacitors of 0.1µF
near the chip, connected to a ground plane, provide good
decoupling from a clean, low inductance power source.
But several inches of wire (i.e., a few microhenrys of
inductance) from the power supplies, unless decoupled
by substantial capacitance (≥10µF) near the chip, can
cause a high Q LC resonance in the hundreds of kHz in the
chip’s supplies or ground reference. This may impair filter
performance at those frequencies. In stringent filter appli-
cations we have often found that a compact, carefully laid
out printed circuit board with good ground plane makes a
difference in both stopband rejection and distortion.
Finally, equipment to measure filter performance can itself
introduce distortion or noise floors. Checking for these
limits with a wire replacing the filter is a prudent routine
procedure.
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