LTC1703
Dual 550kHz Synchronous
2-Phase Switching Regulator
Controller with 5-Bit VID
FEATURES
s
s
DESCRIPTIO
s
s
s
s
s
s
s
s
s
s
Two Independent PWM Controllers in One Package
Side 1 Output Is Compliant with Intel Mobile
VID Specifications (Includes 5-Bit DAC)
0.9V to 2.0V Output Voltage with 25mV/50mV Steps
Two Sides Run Out-of-Phase to Minimize C
IN
All N-Channel External MOSFET Architecture
No External Current Sense Resistor
Precision Internal 0.8V
±
1% Reference
550kHz Switching Frequency Minimizes External
Component Size
Very Fast Transient Response
Up to 25A Output Current per Channel
Low Shutdown Current: < 100µA
Small 28-Pin SSOP Package
APPLICATIO S
s
s
s
s
Mobile Pentium
®
III Processor Systems
Microprocessor Core and I/O Supplies
Multiple Logic Supply Generator
High Efficiency Power Conversion
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation. Pentium is a registered trademark
of Intel Corporation.
The LTC
®
1703 is a dual switching regulator controller opti-
mized for high efficiency with low input voltages. It includes
two complete, on-chip, independent switching regulator
controllers. Each is designed to drive a pair of external
N-channel MOSFET devices in a voltage mode feedback,
synchronous buck configuration. The LTC1703 includes
digital output voltage adjustment on side 1 that conforms to
the Intel Mobile VID specification. It uses a constant-
frequency, true PWM design switching at 550kHz, minimiz-
ing external component size and cost and optimizing load
transient performance. The synchronous buck architecture
automatically shifts to discontinuous and then to Burst
Mode
TM
operation as the output load decreases, ensuring
maximum efficiency over a wide range of load currents.
The LTC1703 features an onboard reference trimmed to 1%
and delivers better than 1.5% regulation at the converter
outputs. An optional latching FAULT mode protects the load
if the output rises 15% above the intended voltage. Each
channel can be enabled independently; with both channels
disabled, the LTC1703 shuts down and supply current drops
below 100µA.
TYPICAL APPLICATIO
V
OUT1
0.9V
TO 2V
15A
L1
1µH
QT1
Dual Output Mobile Pentium III Processor Supply
DCP1
MBR0520LT1
1µF
DCP2
MBR0520LT1
QT2
L2
2.2µH
LTC1703
C
OUT1
180µF
4V
×
6
QB1A
1
2
QB1B
CCP1
1µF
3
4
5
R
IMAX1
,18.7k 6
7
8
9
10
C21
C11
11
15pF
220pF
12
13
R31, 10k
14
VID0
VID1
VID2
VID3
VID4
PV
CC
I
MAX2
BOOST1
BOOST2
BG1
BG2
TG1
TG2
SW1
SW2
I
MAX1
PGND
FCB
FAULT
RUN/SS1 RUN/SS2
COMP1
COMP2
SGND
FB2
FB1
V
CC
VID4
SENSE
VID3
VID0
VID2
VID1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CCP2
1µF
+
QB2
R
IMAX2
20k
GND
C
SS1
0.22µF
R21
100k
C31
220pF
R22, 100k
C22
15pF
1µF
L1: MURATA LQT12535C1R5N12
L2: COILTRONICS UP2B-2R2
QT1, QB1A, QB1B: INTERNATIONAL RECTIFIER IRF7811
QT2, QB2: 1/2 FAIRCHILD NDS8926
U
V
IN
4.5V TO 5.5V
U
U
+
C
IN
150µF
10V
×
2
V
OUT2
1.5V
3A
+
C
OUT2
180µF
4V
C32
2200pF
R12
10.2k
0.1%
R32
1k
10Ω
RB2
11.5k
0.1%
C12
220pF
GND
GND
1703 TA01
C
SS2
0.22µF
1
LTC1703
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
PV
CC
BOOST1
BG1
TG1
SW1
I
MAX1
FCB
RUN/SS1
COMP1
1
2
3
4
5
6
7
8
9
28 I
MAX2
27 BOOST2
26 BG2
25 TG2
24 SW2
23 PGND
22 FAULT
21 RUN/SS2
20 COMP2
19 FB2
18 V
CC
17 VID4
16 VID3
15 VID2
G PACKAGE
28-LEAD PLASTIC SSOP
T
JMAX
= 125°C,
θ
JA
= 55°C/ W
Supply Voltage
V
CC ...........................................................................................
7V
BOOSTn
...............................................................
15V
BOOSTn – SWn .................................................... 7V
Input Voltage
SWn .......................................................... – 1V to 8V
VIDn ....................................................... – 0.3V to 7V
All Other Inputs ......................... – 0.3V to V
CC
+ 0.3V
Peak Output Current < 10µs
TGn, BGn ............................................................... 5A
Operating Temperature Range .................... 0°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LTC1703CG
SGND 10
FB1 11
SENSE 12
VID0 13
VID1 14
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
V
CC
= 5V unless otherwise specified. (Note 3)
SYMBOL
V
CC
PV
CC
BV
CC
I
CC
IPV
CC
I
BOOST
V
FB
∆V
FB
I
FB
∆V
OUT
V
FCB
∆V
FCB
I
FCB
V
RUN
I
SS
PARAMETER
V
CC
Supply Voltage
PV
CC
Supply Voltage
BOOST Pin Voltage
V
CC
Supply Current
PV
CC
Supply Current
BOOST Pin Current
Feedback Voltage
Feedback Voltage Line Regulation
Feedback Current
Output Voltage Load Regulation
FCB Threshold
FCB Feedback Hysteresis
FCB Pin Current
RUN/SS Pin RUN Threshold
Soft Start Source Current
RUN/SSn = 0V
q
q
CONDITIONS
q
MIN
3
3
2.7
TYP
MAX
7
7
7
UNITS
V
V
V
mA
µA
mA
µA
mA
µA
V
%/V
µA
%
V
mV
µA
V
µA
Main Control Loop
(Note 2)
V
BOOST
– V
SW
(Note 2)
Test Circuit 1
RUN/SS1 = RUN/SS2 = 0V (Note 5)
Test Circuit 1 (Note 4)
RUN/SS1 = RUN/SS2 = 0V (Note 5)
Test Circuit 1 (Note 4)
RUN/SS1 = RUN/SS2 = 0V
Test Circuit 1
V
CC
= 3V to 7V
FB2 Only (Note 8)
(Note 6)
q
q
q
q
q
q
q
q
q
q
q
q
q
2.2
30
2.2
6
1.3
0.1
0.792
0.800
±0.005
±0.001
0.1
0.75
0.8
20
±0.001
0.45
– 1.5
0.55
– 3.5
8
100
6
100
3
10
0.808
±0.05
±1
±0.2
0.85
±1
0.65
– 5.5
2
U
W
U
U
W W
W
LTC1703
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
V
CC
= 5V unless otherwise specified. (Note 3)
SYMBOL
V
OSC
f
OSC
Φ
OSC2
DC
MIN1
DC
MIN2
DC
MAX
t
NOV
t
r
, t
f
A
VFB
GBW
I
ERR
V
MIN
V
MAX
A
VILIM
I
IMAX
Status Outputs
V
FAULT
V
OLF
I
FAULT
t
FAULT
VID Inputs
R11
R
PULLUP
VID
T
I
VID-LEAK
V
PULLUP
Resistance Between SENSE and FB1
Programmed from 0.9V to 2V
V
DIODE
= 0.6V (Note 7)
V
IL
(2.7V
≤
V
CC
≤
5.5V)
V
IH
(2.7V
≤
V
CC
≤
5.5V)
V
CC
< VID < 7V (Note 7)
V
CC
= 3.3V
V
CC
= 5V
1.6
0.01
2.8
4.5
±1
q
PARAMETER
Oscillator Amplitude
Oscillator Frequency
Controller 2 Oscillator Phase
Minimum Duty Cycle
Minimum Duty Cycle
Maximum Duty Cycle
Driver Nonoverlap
Driver Rise/Fall Time
FB DC Gain
FB Gain Bandwidth
FB Sink/Source Current
MIN Comparator Threshold
MAX Comparator Threshold
I
LIM
Gain
I
MAX
Source Current
FAULT Trip Point
FAULT Output Low Voltage
FAULT Output Current
FAULT Delay Time
CONDITIONS
MIN
TYP
1
MAX
UNITS
V
P-P
Switching Characteristics
Test Circuit 1
Relative to Controller 1
V
FB
< V
MAX
V
FB
> V
MAX
Test Circuit 1 (Note 9)
Test Circuit 1 (Note 9)
q
q
q
q
q
q
475
7
0
87
550
180
10
90
40
12
750
kHz
DEG
%
%
93
100
80
%
ns
ns
dB
MHz
mA
Feedback Amplifier
q
74
±3
815
85
25
±10
760
840
40
785
COMP
N
Output
q
q
q
mV
mV
dB
Current Limit Loop
I
MAX
= 0V
V
FB
Relative to Regulated V
OUT
I
FAULT
= 1mA
V
FAULT
= 0V
V
FB
> V
FAULT
to FAULT
(Note 9)
q
–7
+ 10
–10
+ 15
0.03
– 10
25
10
–13
+ 20
0.1
µA
%
V
µA
µs
kΩ
q
q
V
OUT
Error % Output Voltage Accuracy (Side 1)
VID Input Pull-Up Resistance
VID Input Voltage Threshold
VID Input Leakage Current
VID Pull-Up Voltage
– 1.5
40
1.5
0.4
%
kΩ
V
V
µA
V
V
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
PV
CC
and BV
CC
(V
BOOST
– V
SW
) must be greater than V
GS(ON)
of
the external MOSFETs used to ensure proper operation.
Note 3:
All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 4:
Supply current in normal operation is dominated by the current
needed to charge and discharge the external MOSFET gates. This current
will vary with supply voltage and the external MOSFETs used.
Note 5:
Supply current in shutdown is dominated by external MOSFET
leakage and may be significantly higher than the quiescent current drawn
by the LTC1703, especially at elevated temperature.
Note 6:
This parameter is guaranteed by correlation and is not tested
directly.
Note 7:
Each built-in pull-up resistor attached to the VID inputs also has a
series diode connected to V
CC
to allow input voltages higher than the V
CC
supply without damage or clamping. (See Block Diagram.)
Note 8:
Feedback current at FB1 will be higher due to internal VID
resistors.
Note 9:
Rise and fall times are measured using 10% and 90% levels. Delay
and nonoverlap times are measured using 50% levels.
3
LTC1703
TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Load Current
100
V
IN
= 5V
V
OUT
= 3.3V
V
OUT
= 2.5V
V
OUT
= 1.6V
EFFICIENCY (%)
90
DRIVER SUPPLY CURRENT (mA)
80
70
0
5
10
LOAD CURRENT (A)
15
1703 G01
Supply Current vs Temperature
2.6
TEST CIRCUIT 1
2.4 C
L
= 0pF
SUPPLY CURRENT (mA)
NORMALIZED FREQUENCY (%)
PV
CC
V
CC
2.2
2.0
1.8
1.6
1.4
1.2
1.0
– 50 – 25
0
BOOST1, BOOST2
0
–0.5
–1.0
–1.5
–2.0
R
ON
(Ω)
75
50
25
TEMPERATURE (°C)
RUN/SS Source Current
vs Temperature
5.0
4.5
SOURCE CURRENT (µA)
V
CC
= 5V
4.0
3.5
3.0
2.5
2.0
–50 –25
NONOVERLAP (ns)
50
40
30
20
10
RISE/FALL TIME (ns)
50
25
75
0
TEMPERATURE (°C)
4
U W
100
1703 G04
Transient Response
V
IN
= 5V
V
OUT
= 1.8V
I
LOAD
= 0A-10A-0A
±2.2%
MAX DEVIATION
35
MOSFET Driver Supply Current
vs Gate Capacitance
TEST CIRCUIT 1
ONE DRIVER LOADED
30 MULTIPLY BY # OF ACTIVE
DRIVERS TO OBTAIN TOTAL
25 DRIVER SUPPLY CURRENT
20mV/
DIV
20
15
10
5
0
0
2000
4000
6000
8000
GATE CAPACITANCE (pF)
10000
1703
G03
10µs/DIV
1703 G02
Normalized Frequency
vs Temperature
2.5
2.0
1.5
1.0
0.5
V
CC
= 5V
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
50
25
0
75
TEMPERATURE (°C)
100
125
Driver R
ON
vs Temperature
V
PVCC
= 5V
V
BOOST
– V
SW
= 5V
125
–2.5
–50 –25
0.4
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
1703 G05
1703 G06
Nonoverlap Time vs Temperature
70
60
15
Driver Rise/Fall vs Temperature
TEST CIRCUIT 1
C
L
= 2000pF
14
TEST CIRCUIT 1
C
L
= 2000pF
TG FALLING EDGE
BG RISING EDGE
13
BG FALLING EDGE
TG RISING EDGE
12
11
100
125
0
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
12
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
1703 G07
1703 G08
1703 G09
LTC1703
PI FU CTIO S
PV
CC
(Pin 1):
Driver Power Supply Input. PV
CC
provides
power to the two BGn output drivers. PV
CC
must be
connected to a voltage high enough to fully turn on the
external MOSFETs QB1 and QB2. PV
CC
should generally
be connected directly to V
IN
. PV
CC
requires at least a 1µF
bypass capacitor directly to PGND.
BOOST1 (Pin 2):
Controller 1 Top Gate Driver Supply. The
BOOST1 pin supplies power to the floating TG1 driver.
BOOST1 should be bypassed to SW1 with a 1µF capacitor.
An additional Schottky diode from V
IN
to BOOST1 pin will
create a complete floating charge-pumped supply at
BOOST1. No other external supplies are required.
BG1 (Pin 3):
Controller 1 Bottom Gate Drive. The BG1 pin
drives the gate of the bottom N-channel synchronous
switch MOSFET, QB1. BG1 is designed to drive up to
10,000pF of gate capacitance directly. If RUN/SS1 goes
low, BG1 will go low, turning off QB1. If FAULT mode is
tripped, BG1 will go high and stay high, keeping QB1 on
until the power is cycled.
TG1 (Pin 4):
Controller 1 Top Gate Drive. The TG1 pin
drives the gate of the top N-channel MOSFET, QT1. The
TG1 driver draws power from the BOOST1 pin and returns
to the SW1 pin, providing true floating drive to QT1. TG1
is designed to drive up to 10,000pF of gate capacitance
directly. In shutdown or fault modes, TG1 will go low.
SW1 (Pin 5):
Controller 1 Switching Node. SW1 should be
connected to the switching node of converter 1. The TG1
driver ground returns to SW1, providing floating gate
drive to the top N-channel MOSFET switch, QT1. The
voltage at SW1 is compared to I
MAX1
by the current limit
comparator while the bottom MOSFET, QB1, is on.
I
MAX1
(Pin 6):
Controller 1 Current Limit Set. The I
MAX1
pin sets the current limit comparator threshold for
controller 1. If the voltage drop across the bottom MOSFET,
QB1, exceeds the magnitude of the voltage at I
MAX1
,
controller 1 will go into current limit. The I
MAX1
pin has an
internal 10µA current source pull-up, allowing the current
threshold to be set with a single external resistor to PGND.
This current setting resistor should be Kelvin connected to
the source of QB1. See the Current Limit Programming
section for more information on choosing R
IMAX
.
FCB (Pin 7):
Force Continuous Bar. The FCB pin forces
both converters to maintain continuous synchronous
operation regardless of load when the voltage at FCB
drops below 0.8V. FCB is normally tied to V
CC
. To force
continuous operation, tie FCB to SGND. FCB can also be
connected to a feedback resistor divider from a secondary
winding on one converter’s inductor to generate a third
regulated output voltage. Do not leave FCB floating.
RUN/SS1 (Pin 8):
Controller 1 Run/Soft-Start. Pulling
RUN/SS1 to SGND will disable controller 1 and turn off
both of its external MOSFET switches. Pulling both
RUN/SS pins down will shut down the entire LTC1703,
dropping the quiescent supply current below 100µA. A
capacitor from RUN/SS1 to SGND will control the turn-on
time and rate of rise of the controller 1 output voltage at
power-up. An internal 3.5µA current source pull-up at
RUN/SS1 pin sets the turn-on time at approximately
50ms/µF.
COMP1 (Pin 9):
Controller 1 Loop Compensation. The
COMP1 pin is connected directly to the output of the first
controller’s error amplifier and the input to the PWM
comparator. An RC network is used at the COMP1 pin to
compensate the feedback loop for optimum transient
response.
SGND (Pin 10):
Signal Ground. All internal low power
circuitry returns to the SGND pin. Connect to a low
impedance ground, separated from the PGND node. All
feedback, compensation and soft-start connections should
return to SGND. SGND and PGND should connect only at
a single point, near the PGND pin and the negative plate of
the C
IN
bypass capacitor.
FB1 (Pin 11):
Controller 1 Feedback Input. The loop
compensation network for controller 1 should be con-
nected to FB1. FB1 is connected internally to the VID
resistor network to set the output voltage at side 1.
SENSE (Pin 12):
Output Sense. Connect to V
OUT1
.
VID0 to VID4 (Pins 13 to 17):
VID Programming Inputs.
These are logic inputs that set the output voltage at side 1
to a preprogrammed value (see Table 1). VID4 is the MSB,
VID0 is the LSB. The codes selected by the VIDn inputs
correspond to the Intel Mobile VID specification. Each
U
U
U
5
stm32/stm8
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