Final Electrical Specifications
LTC1771
Low Quiescent Current
High Efficiency Step-Down
DC/DC Controller
FEATURES
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DESCRIPTIO
February 2000
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Very Low Standby Current: 10µA
Available in Space-Saving 8-Lead MSOP Package
High Output Currents
Wide V
IN
Range: 2.8V to 20V Operation
V
OUT
Range: 1.23V to 18V
High Efficiency: Over 93% Possible
±2%
Output Accuracy
Very Low Dropout Operation: 100% Duty Cycle
Current Mode Operation for Excellent Line and
Load Transient Response
Defeatable Burst Mode
TM
Operation
Short-Circuit Protected
Optional Programmable Soft-Start
Micropower Shutdown: I
Q
= 2µA
The LTC
®
1771 is a high efficiency current mode step-
down DC/DC controller that draws as little as 10µA DC
supply current to regulate the output at no load while
maintaining high efficiency for loads up to several amps.
The LTC1771 drives an external P-channel power MOSFET
using a current mode, constant off-time architecture. An
external sense resistor is used to program the operating
current level. Current mode control provides short-circuit
protection, excellent transient response and controlled
start-up behavior. Burst Mode operation enables the
LTC1771 to maintain high efficiency down to extremely
low currents. Shutdown mode further reduces the supply
current to a mere 2µA. For low noise applications, Burst
Mode operation can be easily disabled with the MODE pin.
Wide input supply range of 2.8V to 18V (20V maximum)
and 100% duty cycle operation for low dropout make the
LTC1771 ideal for a wide variety of battery-powered appli-
cations where maximizing battery life is important.
The LTC1771’s availability in both 8-lead MSOP and SO
packages provides for a minimum area solution.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
APPLICATIO S
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Cellular Telephones and Wireless Modems
1- to 4-Cell Lithium-Ion-Powered Applications
Portable Instruments
Battery-Powered Equipment
Battery Chargers
Scanners
TYPICAL APPLICATIO
V
IN
4.5V TO 18V
R
SENSE
0.05Ω
V
IN
RUN/SS
C
SS
0.01µF
R
C
10k
C
C
22OpF
SENSE
PGATE
M1
Si6447DQ
10µF
25V
CER
100
V
IN
= 5V
90
EFFICIENCY (%)
I
TH
LTC1771
V
FB
MODE
GND
V
IN
R2
1.64M
1%
L1
15µH
UPS5817
80
70
60
50
40
0.1
V
OUT
= 3.3V
R
SENSE
= 0.05Ω
1
+
C
OUT
150µF
6.3V
V
OUT
3.3V
2A
R1
1M
1%
5pF
1771 F01
Figure 1. High Efficiency Step-Down Converter
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
U
U
LTC1771 Efficiency
V
IN
= 10V
V
IN
= 15V
10
100
1000
LOAD CURRENT (mA)
10000
1771 F01b
1
LTC1771
ABSOLUTE
AXI U
RATI GS
(Note 1)
Junction Temperature (Note 2) ............................ 125°C
Operating Temperature Range (Note 3)
LTC1771E ......................................... – 40°C to 85°C
LTC1771I ......................................... – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
Input Supply Voltage (V
IN
)........................ – 0.3V to 20V
Peak Driver Output Current < 10µs (PGATE) ............. 1A
RUN/SS Voltage ........................... – 0.3V to (V
IN
+ 0.3V)
MODE Voltage .......................................... – 0.3V to 20V
I
TH
, V
FB
Voltage .......................................... – 0.3V to 5V
SENSE Voltage (V
IN
> 12V)...(V
IN
– 12V) to (V
IN
+ 0.3V)
SENSE Voltage (V
IN
≤
12V) .......... – 0.3V to (V
IN
+ 0.3V)
PACKAGE/ORDER I FOR ATIO
TOP VIEW
RUN/SS
I
TH
V
FB
GND
1
2
3
4
8
7
6
5
MODE
SENSE
V
IN
PGATE
ORDER PART
NUMBER
LTC1771EMS8
MS8 PART MARKING
LTKD
RUN/SS 1
I
TH
2
V
FB
3
GND 4
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 150°C/ W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
V
IN
= 10V, V
RUN
= open unless otherwise specified.
SYMBOL
V
FB
I
FB
I
SUPPLY
∆V
LINEREG
∆V
LOADREG
I
Q
PARAMETER
Feedback Voltage
Feedback Current
No-Load Supply Current
Reference Voltage Line Regulation
Output Voltage Load Regulation
Input DC Supply Current
Active Mode (PGATE = 0V)
Sleep Mode (Note 6)
Shutdown
Short Circuit
Maximum Current Sense Threshold
Minimum Current Sense Threshold
Sleep Current Sense Threshold
Switch Off Time
Mode Pin Threshold
CONDITIONS
(Note 5)
(Note 5)
V
IN
= 10V, I
LOAD
= 0 (Note 6)
V
IN
= 5V to 15V (Note 5)
I
TH
= 0.5V to 2V, Burst Disabled (Note 5)
(Note 4)
V
IN
= 2.8V to 18V
V
IN
= 2.8V to 18V, V
FB
= 1.5V
V
IN
= 2.8V to 18V, V
RUN
= 0V
V
IN
= 2.8V to 18V, V
FB
= 0V
V
FB
= V
REF
– 20mV
V
FB
= V
REF
+ 10mV, Burst Disabled
I
TH
= 1V
V
FB
at Regulated Value
V
FB
= 0V
V
MODE
Rising
q
q
q
q
q
q
∆V
SENSE(MAX)
∆V
SENSE(MIN)
∆V
SENSE(SLEEP)
t
OFF
V
MODE
2
U
U
W
W W
U
W
TOP VIEW
8
7
6
5
MODE
SENSE
V
IN
PGATE
ORDER PART
NUMBER
LTC1771ES8
LTC1771IS8
S8 PART MARKING
1771
1771I
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 125°C,
θ
JA
= 110°C/ W
MIN
1.205
TYP
1.230
1
10
0.003
0.25
150
9
2
175
MAX
1.255
10
0.03
1
235
15
6
275
180
UNITS
V
nA
µA
%/V
%
µA
µA
µA
µA
mV
mV
mV
µs
µs
110
140
– 25
50
3.5
70
0.5
1.3
2
V
LTC1771
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
V
IN
= 10V, V
RUN
= open unless otherwise specified.
SYMBOL
V
RUN/SS
I
RUN
PGATE t
r
, t
f
PARAMETER
RUN/SS Pin Threshold
Source Current
PGATE Transition Time (Note 7)
Rise Time
Fall Time
CONDITIONS
V
RUN/SS
Rising
V
RUN
= 0V, V
IN
= 2.8V to 18V
C
LOAD
= 2000pF
C
LOAD
= 2000pF
q
MIN
0.5
0.3
TYP
1.0
1
80
90
MAX
2
3
UNITS
V
µA
ns
ns
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formulas:
LTC1771S8: T
J
= T
A
+ (P
D
)(110°C/W)
LTC1771MS8: T
J
= T
A
+ (P
D
)(150°C/W)
Note 3:
The LTC1771E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the – 40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC1771I is guaranteed and tested
over the – 40°C to 85°C operating temperature range.
Note 4:
Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 5:
The LTC1771 is tested in a feedback loop that servos V
FB
to the
balance point for the error amplifier (V
ITH
= 1.23V).
Note 6:
No-load supply current consists of sleep mode current (9µA
typical) plus a small switching component necessary to overcome
Schottky diode leakage and feedback resistor current.
Note 7:
t
r
and t
f
measured at 10% to 90% levels.
PI FU CTIO S
RUN/SS (Pin 1):
The voltage level on this pin controls
shutdown/run mode (ground = shutdown, open/high =
run). Connecting an external capacitor to this pin provides
soft-start.
I
TH
(Pin 2):
Error Amplifier Compensation Point. The
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is 0V to 3V.
V
FB
(Pin 3):
Feedback of Output Voltage for Comparison
to Internal 1.23V Reference. An external resistive divider
across the output is returned to this pin.
GND (Pin 4):
Ground Pin.
PGATE (Pin 5):
High Current Gate Driver for External
P-Channel MOSFET Switch. Voltage swing is from ground
to V
IN
.
V
IN
(Pin 6):
Main Input Voltage Supply Pin.
SENSE (Pin 7):
Current Sense Input for Monitoring Switch
Current. Maximum switch current and Burst Mode
threshold is programmed with an external resistor be-
tween SENSE and V
IN
.
MODE (Pin 8):
Burst Mode Enable/Disable Pin. Connect-
ing this pin to V
IN
(or above 2V) enables Burst Mode
operation, while connecting this pin to ground disables
Burst Mode operation. Do not leave floating.
U
U
U
3
LTC1771
FUNCTIONAL BLOCK DIAGRA
V
IN
1µA
RUN/SS
1
MODE
8
(BURST ENABLE)
10% CURRENT
1.23V
C
SS
+
–
ON
EA
V
OUT
10% CURRENT
SLEEP
*
I
TH
2
R
C
C
C
GND
4
1V
2V
1V
–
+
B
READY
V
IN
BLANKING
MODE
ON TRIGGER
1-SHOT
3.5µs
STRETCH
V
FB
3
V
OUT
L
*
OPTIONAL FOR FOLDBACK
CURRENT LIMITING
4
+
ON
C
–
SOFT-START
W
V
IN
6
READY
1.23V
REFERENCE
22k
R
SENSE
U
U
+
V
IN
C
IN
SENSE
7
250k
SW
5
+
C
OUT
1771 BD
LTC1771
OPERATIO
Main Control Loop
The LTC1771 uses a constant off-time, current mode
step-down architecture. During normal operation, the
P-channel MOSFET is turned on at the beginning of each
cycle and turned off when the current comparator C
triggers the 1-shot timer. The external MOSFET switch
stays off for the 3.5µs 1-shot duration and then turns back
on again to begin a new cycle. The peak inductor current
at which C triggers the 1-shot is controlled by the voltage
on Pin 3 (I
TH
), the output of the error amplifier EA. An
external resistive divider connected between V
OUT
and
ground allows EA to receive an output feedback voltage
V
FB
. When the load current increases, it causes a slight
decrease in V
FB
relative to the 1.23V reference, which in
turn causes the I
TH
voltage to increase until the average
inductor current matches the new load current.
The main control loop is shut down by pulling Pin 1
(RUN/SS) low. Releasing RUN/SS allows an internal 1µA
current source to charge soft-start capacitor C
SS
. When
C
SS
reaches 1V, the main control loop is enabled with the
I
TH
voltage clamped at approximately 40% of its maxi-
mum value. As C
SS
continues to charge, I
TH
is gradually
released allowing normal operation to resume.
Burst Mode Operation
The LTC1771 provides outstanding low current efficiency
and ultralow no-load supply current by using Burst Mode
operation when the MODE pin is pulled above 2V. During
Burst Mode operation, short burst cycles of normal switch-
ing are followed by a longer idle period with the switch off
and the load current is supplied by the output capacitor.
During this idle period, only the minimum required cir-
cuitry—1.23V reference and error amp—are left on, and
the supply current is reduced to 9µA. At no load, the output
capacitor is still discharged very slowly by leakage current
in the Schottky diode and feedback resistor current result-
ing in very low frequency burst cycles that add a few more
microamps to the supply current.
U
(Refer to Functional Block Diagram)
Burst Mode operation is provided by clamping the mini-
mum I
TH
voltage at 1V which represents about 25% of
maximum load current. If the load falls below this level, i.e.
the I
TH
voltage tries to fall below 1V, the burst comparator
B switches state signaling the LTC1771 to enter sleep
mode. During this time, EA is reduced to 10% of its normal
operating current and the external compensation capaci-
tor is disconnected and clamped to 1V so that the EA can
drive its output with the lower available current. As the load
discharges the output capacitor, the internal I
TH
voltage
increases. When it exceeds 1V the burst comparator exits
sleep mode, reconnects the external compensation com-
ponents to the error amplifier output, and returns EA to full
power along with the other necessary circuitry. This
scheme (patent pending) allows the EA to be reduced to
such a low operating current during sleep mode without
adding unacceptable delay to wake up the LTC1771 due to
the compensation capacitor on I
TH
required for stability in
normal operation.
Burst Mode operation can be disabled by pulling the
MODE pin to ground. In this mode of operation, the burst
comparator B is disabled and the I
TH
voltage allowed to go
all the way to 0V. The load can now be reduced to about 1%
of maximum load before the loop skips cycles to maintain
regulation. This mode provides a low noise output spec-
trum, useful for reducing both audio and RF interference,
at the expense of reduced efficiency at light loads.
Off-Time
The off-time duration is 3.5µs when the feedback voltage
is close to the reference voltage; however, as the feedback
voltage drops, the off-time lengthens and reaches a maxi-
mum value of about 70µs when V
FB
is zero. This ensures
that the inductor current has enough time to decay when
the reverse voltage across the inductor is low such as
during short circuit, thus protecting the MOSFET and
inductor.
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