Final Electrical Specifications
LTC2401/LTC2402
1-/2-Channel 24-Bit
µPower
No Latency
∆Σ
TM
ADC in MSOP-10
FEATURES
s
s
s
s
DESCRIPTIO
January 2000
s
s
s
s
s
s
s
s
s
s
s
24-Bit ADC in Tiny MSOP-10 Package
1- or 2-Channel Inputs
Automatic Channel Selection (Ping-Pong) (LTC2402)
Zero Scale and Full Scale Set for Reference
and Ground Sensing
4ppm INL, No Missing Codes
4ppm Full-Scale Error
0.5ppm Offset
0.6ppm Noise
Internal Oscillator—No External Components Required
110dB Min, 50Hz/60Hz Notch Filter
Single Conversion Settling Time for
Multiplexed Applications
Reference Input Voltage: 0.1V to V
CC
Live Zero—Extended Input Range Accommodates
12.5% Overrange and Underrange
Single Supply 2.7V to 5.5V Operation
Low Supply Current (200µA) and Auto Shutdown
The LTC
®
2401/LTC2402 are 1- and 2-channel 2.7V to
5.5V micropower 24-bit analog-to-digital converters with
an integrated oscillator, 4ppm INL and 0.6ppm RMS
noise. These ultrasmall devices use delta-sigma technol-
ogy and a new digital filter architecture that settles in a
single cycle. This eliminates the latency found in conven-
tional
∆Σ
converters and simplifies multiplexed applica-
tions.
Through a single pin, the LTC2401/LTC2402 can be
configured for better than 110dB rejection at 50Hz or
60Hz
±2%,
or can be driven by an external oscillator for
a user defined rejection frequency in the range 1Hz to
120Hz. The internal oscillator requires no external fre-
quency setting components.
These converters accept an external reference voltage
from 0.1V to V
CC
. With an extended input conversion
range of –12.5% V
REF
to 112.5% V
REF
(V
REF
= FS
SET
–
ZS
SET
), the LTC2401/LTC2402 smoothly resolve the off-
set and overrange problems of preceding sensors or
signal conditioning circuits.
The LTC2401/LTC2402 communicate through a 2- or
3-wire digital interface that is compatible with SPI and
MICROWIRE
TM
protocols.
, LTC and LT are registered trademarks of Linear Technology Corporation.
No Latency
∆Σ
is a trademark of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corporation.
APPLICATIO S
s
s
s
s
s
s
s
Weight Scales
Direct Temperature Measurement
Gas Analyzers
Strain-Gage Transducers
Instrumentation
Data Acquisition
Industrial Process Control
TYPICAL APPLICATIO
2.7V TO 5.5V
1µF
1
V
CC
LTC2402
REFERENCE VOLTAGE
ZS
SET
+ 0.1V TO V
CC
ANALOG
INPUT RANGE
–0.12V
REF
TO 1.12V
REF
(V
REF
= FS
SET
– ZS
SET
)
0V TO FS
SET
– 100mV
2
3
4
5
FS
SET
CH1
CH0
ZS
SET
SCK
SDO
CS
GND
F
O
Pseudo Differential Bridge Digitizer
2.7V TO 5.5V
V
CC
10
= INTERNAL OSC/50Hz REJECTION
= EXTERNAL CLOCK SOURCE
= INTERNAL OSC/60Hz REJECTION
9
8
7
6
3-WIRE
SPI INTERFACE
24012 TA01
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
1
2
4
3
5
V
CC
LTC2402
FS
SET
9
SCK
CH0
CH1
ZS
SET
GND
6
SDO
CS
F
O
8
7
10
U
U
3-WIRE
SPI INTERFACE
INTERNAL OSCILLATOR
60Hz REJECTION
24012TA02
1
LTC2401/LTC2402
ABSOLUTE
MAXIMUM
RATINGS
Supply Voltage (V
CC
) to GND .......................– 0.3V to 7V
Analog Input Voltage to GND ....... – 0.3V to (V
CC
+ 0.3V)
Reference Input Voltage to GND .. – 0.3V to (V
CC
+ 0.3V)
Digital Input Voltage to GND ........ – 0.3V to (V
CC
+ 0.3V)
Digital Output Voltage to GND ..... – 0.3V to (V
CC
+ 0.3V)
PACKAGE/ORDER INFORMATION
ORDER PART NUMBER
TOP VIEW
V
CC
FS
SET
V
IN
NC
ZS
SET
1
2
3
4
5
10
9
8
7
6
F
O
SCK
SDO
CS
GND
TOP VIEW
LTC2401CMS
LTC2401IMS
MS10 PART MARKING
LTMB
LTMC
MS10 PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 130°C/W
Consult factory for Military grade parts.
CONVERTER CHARACTERISTICS
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
REF
= FS
SET
– ZS
SET
. (Notes 3, 4)
PARAMETER
Resolution
No Missing Codes Resolution
Integral Nonlinearity
Offset Error
Offset Error Drift
Full-Scale Error
Full-Scale Error Drift
Total Unadjusted Error
Output Noise
Normal Mode Rejection 60Hz
±2%
Normal Mode Rejection 50Hz
±2%
Power Supply Rejection, DC
Power Supply Rejection, 60Hz
±2%
Power Supply Rejection, 50Hz
±2%
0.1V
≤
FS
SET
≤
V
CC
, ZS
SET
= 0V (Note 5)
FS
SET
= 2.5V, ZS
SET
= 0V (Note 6)
FS
SET
= 5V, ZS
SET
= 0V (Note 6)
2.5V
≤
FS
SET
≤
V
CC
, ZS
SET
= 0V
2.5V
≤
FS
SET
≤
V
CC
, ZS
SET
= 0V
2.5V
≤
FS
SET
≤
V
CC
, ZS
SET
= 0V
2.5V
≤
FS
SET
≤
V
CC
, ZS
SET
= 0V
FS
SET
= 2.5V, ZS
SET
= 0V
FS
SET
= 5V, ZS
SET
= 0V
V
IN
= 0V (Note 13)
(Note 7)
(Note 8)
FS
SET
= 2.5V, ZS
SET
= 0V, V
IN
= 0V
FS
SET
= 2.5V, ZS
SET
= 0V, V
IN
= 0V, (Note 7)
FS
SET
= 2.5V, ZS
SET
= 0V, V
IN
= 0V, (Note 8)
q
q
q
CONDITIONS
q
q
q
q
q
2
U
U
W
W W
U
W
(Notes 1, 2)
Operating Temperature Range
LTC2401/LTC2402C ................................ 0°C to 70°C
LTC2401/LTC2402I ............................ – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART NUMBER
V
CC
FS
SET
CH1
CH0
ZS
SET
1
2
3
4
5
10
9
8
7
6
F
O
SCK
SDO
CS
GND
LTC2402CMS
LTC2402IMS
MS10 PART MARKING
LTMD
LTME
MS10 PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 130°C/W
U
MIN
24
24
TYP
MAX
UNITS
Bits
Bits
2
4
0.5
0.01
4
0.04
5
10
3
110
110
130
130
100
110
110
10
15
2
10
ppm of V
REF
ppm of V
REF
ppm of V
REF
ppm of V
REF
/°C
ppm of V
REF
ppm of V
REF
/°C
ppm of V
REF
ppm of V
REF
µV
RMS
dB
dB
dB
dB
dB
LTC2401/LTC2402
A ALOG I PUT A D REFERE CE
SYMBOL
V
IN
FS
SET
ZS
SET
C
S(IN)
C
S(REF)
I
IN(LEAK)
I
REF(LEAK)
PARAMETER
Input Voltage Range
Full-Scale Set Range
Zero-Scale Set Range
Input Sampling Capacitance
Reference Sampling Capacitance
Input Leakage Current
Reference Leakage Current
CS = V
CC
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
REF
= FS
SET
– ZS
SET
. (Note 3)
CONDITIONS
(Note 14)
q
q
q
V
REF
= 2.5V, CS = V
CC
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
V
IH
V
IL
I
IN
I
IN
C
IN
C
IN
V
OH
V
OL
V
OH
V
OL
I
OZ
PARAMETER
High Level Input Voltage
CS, F
O
Low Level Input Voltage
CS, F
O
High Level Input Voltage
SCK
Low Level Input Voltage
SCK
Digital Input Current
CS, F
O
Digital Input Current
SCK
Digital Input Capacitance
CS, F
O
Digital Input Capacitance
SCK
High Level Output Voltage
SDO
Low Level Output Voltage
SDO
High Level Output Voltage
SCK
Low Level Output Voltage
SCK
High-Z Output Leakage
SDO
(Note 9)
I
O
= – 800µA
I
O
= 1.6mA
I
O
= – 800µA (Note 10)
I
O
= 1.6mA (Note 10)
CONDITIONS
2.7V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
3.3V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
The
q
denotes specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
MIN
q
q
q
q
q
q
2.7V
≤
V
CC
≤
5.5V (Note 9)
2.7V
≤
V
CC
≤
3.3V (Note 9)
4.5V
≤
V
CC
≤
5.5V (Note 9)
2.7V
≤
V
CC
≤
5.5V (Note 9)
0V
≤
V
IN
≤
V
CC
0V
≤
V
IN
≤
V
CC
(Note 9)
POWER REQUIRE E TS
SYMBOL
V
CC
I
CC
PARAMETER
Supply Voltage
Supply Current
Conversion Mode
Sleep Mode
The
q
denotes specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. (Note 3)
CONDITIONS
q
CS = 0V (Note 12)
CS = V
CC
(Note 12)
U
U W
U
U
U
U
U
MIN
– 0.125 • V
REF
0.1 + ZS
SET
0
TYP
MAX
1.125 • V
REF
V
CC
FS
SET
– 0.1
UNITS
V
V
V
pF
pF
10
15
q
q
–10
– 12
1
1
10
12
nA
nA
TYP
MAX
UNITS
V
V
2.5
2.0
0.8
0.6
2.5
2.0
0.8
0.6
–10
–10
10
10
10
10
V
V
V
V
V
V
µA
µA
pF
pF
V
q
q
q
q
q
V
CC
– 0.5
0.4
V
CC
– 0.5
0.4
–10
10
V
V
V
µA
MIN
2.7
TYP
MAX
5.5
UNITS
V
µA
µA
q
q
200
20
300
30
3
LTC2401/LTC2402
TI I G CHARACTERISTICS
SYMBOL
f
EOSC
t
HEO
t
LEO
t
CONV
PARAMETER
External Oscillator Frequency Range
External Oscillator High Period
External Oscillator Low Period
Conversion Time
F
O
= 0V
F
O
= V
CC
External Oscillator (Note 11)
Internal Oscillator (Note 10)
External Oscillator (Notes 10, 11)
(Note 10)
(Note 9)
(Note 9)
(Note 9)
Internal Oscillator (Notes 10, 12)
External Oscillator (Notes 10, 11)
(Note 9)
q
q
q
q
q
q
q
q
The
q
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 3)
CONDITIONS
q
q
q
q
q
q
f
ISCK
D
ISCK
f
ESCK
t
LESCK
t
HESCK
t
DOUT_ISCK
t
DOUT_ESCK
t
1
t2
t3
t4
t
KQMAX
t
KQMIN
t
5
t
6
Note 1:
Absolute Maximum Ratings are those values beyond which the
life of the device may be impaired.
Note 2:
All voltage values are with respect to GND.
Note 3:
V
CC
= 2.7 to 5.5V unless otherwise specified. Input source
resistance = 0Ω.
Note 4:
Internal Conversion Clock source with the F
O
pin tied
to GND or to V
CC
or to external conversion clock source with
f
EOSC
= 153600Hz unless otherwise specified.
Note 5:
Guaranteed by design, not subject to test.
Note 6:
Integral nonlinearity is defined as the deviation of a code from
a straight line passing through the actual endpoints of the transfer
curve. The deviation is measured from the center of the quantization
band.
Note 7:
F
O
= 0V (internal oscillator) or f
EOSC
= 153600Hz
±2%
(external oscillator).
Note 8:
F
O
= V
CC
(internal oscillator) or f
EOSC
= 128000Hz
±2%
(external oscillator).
4
UW
MIN
2.56
0.5
0.5
TYP
MAX
307.2
390
390
UNITS
kHz
µs
µs
ms
ms
ms
kHz
kHz
130.66
133.33
136
156.80
160
163.20
20480/f
EOSC
(in kHz)
19.2
f
EOSC
/8
45
250
250
1.64
1.67
1.70
256/f
EOSC
(in kHz)
32/f
ESCK
(in kHz)
0
0
0
50
200
15
50
50
150
150
150
55
2000
Internal SCK Frequency
Internal SCK Duty Cycle
External SCK Frequency Range
External SCK Low Period
External SCK High Period
Internal SCK 32-Bit Data Output Time
External SCK 32-Bit Data Output Time
CS
↓
to SDO Low Z
CS
↑
to SDO High Z
CS
↓
to SCK
↓
CS
↓
to SCK
↑
SCK
↓
to SDO Valid
SDO Hold After SCK
↓
SCK Set-Up Before CS
↓
SCK Hold After CS
↓
%
kHz
ns
ns
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
(Note 10)
(Note 9)
(Note 5)
q
q
q
q
q
q
Note 9:
The converter is in external SCK mode of operation such that
the SCK pin is used as digital input. The frequency of the clock signal
driving SCK during the data output is f
ESCK
and is expressed in kHz.
Note 10:
The converter is in internal SCK mode of operation such that
the SCK pin is used as digital output. In this mode of operation, the
SCK pin has a total equivalent load capacitance C
LOAD
= 20pF.
Note 11:
The external oscillator is connected to the F
O
pin. The external
oscillator frequency, f
EOSC
, is expressed in kHz.
Note 12:
The converter uses the internal oscillator.
F
O
= 0V or F
O
= V
CC
.
Note 13:
The output noise includes the contribution of the internal
calibration operations.
Note 14:
For reference voltage values V
REF
> 2.5V, the extended input
of – 0.125 • V
REF
to 1.125 • V
REF
is limited by the absolute maximum
rating of the Analog Input Voltage pin (Pin 3). For 2.5V < V
REF
≤
0.267V + 0.89 • V
CC
, the input voltage range is – 0.3V to 1.125 • V
REF
.
For 0.267V + 0.89 • V
CC
< V
REF
≤
V
CC
, the input voltage range is – 0.3V
to V
CC
+ 0.3V.
LTC2401/LTC2402
PIN FUNCTIONS
V
CC
(Pin 1):
Positive Supply Voltage. Bypass to GND
(Pin 4) with a 10µF tantalum capacitor in parallel with
0.1µF ceramic capacitor as close to the part as possible.
FS
SET
(Pin 2):
Full-Scale Set Input. This pin defines the
full-scale input value. When V
IN
= FS
SET
, the ADC outputs
full scale (FFFFF
H
). The total reference voltage is
FS
SET
– ZS
SET
.
CH0, CH1 (Pins 4, 3):
Analog Input Channels. The input
voltage range is – 0.125 • V
REF
to 1.125 • V
REF
. For
V
REF
> 2.5V, the input voltage range may be limited by the
absolute maximum rating of – 0.3V to V
CC
+ 0.3V. Conver-
sions are performed alternately between CH0
and CH1 for the LTC2402. Pin 4 is a No Connect (NC) on
the LTC2401.
ZS
SET
(Pin 5):
Zero-Scale Set Input. This pin defines the
zero-scale input value. When V
IN
= ZS
SET
, the ADC
outputs zero scale (00000
H
).
GND (Pin 6):
Ground. Shared pin for analog ground,
digital ground, reference ground and signal ground. Should
be connected directly to a ground plane through a mini-
mum length trace or it should be the single-point-ground
in a single-point grounding system.
CS (Pin 7):
Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW on CS wakes up the ADC. A
LOW-to-HIGH transition on this pin disables the SDO
digital output. A LOW-to-HIGH transition on CS during the
Data Output transfer aborts the data transfer and starts a
new conversion.
SDO (Pin 8):
Three-State Digital Output. During the data
output period, this pin is used for serial data output. When
the chip select CS is HIGH (CS = V
CC
), the SDO pin is in a
high impedance state. During the Conversion and Sleep
periods, this pin can be used as a conversion status out-
put. The conversion status can be observed by pulling CS
LOW.
SCK (Pin 9):
Bidirectional Digital Clock Pin. In the Internal
Serial Clock Operation mode, SCK is used as digital output
for the internal serial interface clock during the data output
period. In the External Serial Clock Operation mode, SCK
is used as digital input for the external serial interface. An
internal pull-up current source is automatically activated
in Internal Serial Clock Operation mode. The Serial Clock
mode is determined by the level applied to SCK at power
up and the falling edge of CS.
F
O
(Pin 10):
Frequency Control Pin. Digital input that
controls the ADC’s notch frequencies and conversion
time. When the F
O
pin is connected to V
CC
(F
O
= V
CC
), the
converter uses its internal oscillator and the digital filter’s
first null is located at 50Hz. When the F
O
pin is connected
to GND (F
O
= 0V), the converter uses its internal oscillator
and the digital filter’s first null is located at 60Hz. When F
O
is driven by an external clock signal with a frequency f
EOSC
,
the converter uses this signal as its clock and the digital
filter first null is located at a frequency f
EOSC
/2560.
U
U
U
5
电子竞赛
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
