Final Electrical Specifications
LTC2420
20-Bit
µPower
No Latency
∆Σ
TM
ADC in SO-8
January 2000
FEATURES
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DESCRIPTIO
s
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20-Bit ADC in SO-8 Package
8ppm INL, No Missing Codes at 20 Bits
4ppm Full-Scale Error
0.5ppm Offset
1.2ppm Noise
Digital Filter Settles in a Single Cycle. Each
Conversion Is Accurate, Even After an Input Step.
Internal Oscillator—No External Components
Required
Fast Mode: 16-Bit Noise, 12 Bits TUE at 100sps
110dB Min, 50Hz/60Hz Notch Filter
Reference Input Voltage: 0.1V to V
CC
Live Zero—Extended Input Range Accommodates
12.5% Overrange and Underrange
Single Supply 2.7V to 5.5V Operation
Low Supply Current (200µA) and Auto Shutdown
Pin Compatible with 24-Bit LTC2400
The LTC
®
2420 is a micropower 20-bit A/D converter with
an integrated oscillator, 8ppm INL and 1.2ppm RMS
noise that operates from 2.7V to 5.5V. It uses delta-sigma
technology and provides a digital filter that settles in a
single cycle for multiplexed applications. Through a single
pin, the LTC2420 can be configured for better than 110dB
rejection at 50Hz or 60Hz
±2%,
or it can be driven by an
external oscillator for a user-defined rejection frequency
in the range 1Hz to 800Hz. The internal oscillator requires
no external frequency setting components.
The converter accepts any external reference voltage from
0.1V to V
CC
. With its extended input conversion range of
–12.5% V
REF
to 112.5% V
REF
, the LTC2420 smoothly
resolves the offset and overrange problems of preceding
sensors or signal conditioning circuits.
The LTC2420 communicates through a flexible 3-wire
digital interface which is compatible with SPI and
MICROWIRE
TM
protocols.
, LTC and LT are registered trademarks of Linear Technology Corporation.
No Latency
∆Σ
is a trademark of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corporation.
APPLICATIO S
s
s
s
s
s
s
s
s
Weight Scales
Direct Temperature Measurement
Gas Analyzers
Strain-Gage Transducers
Instrumentation
Data Acquisition
Industrial Process Control
4-Digit DVMs
TYPICAL APPLICATIO
2.7V TO 5.5V
1µF
1
V
CC
LTC2420
REFERENCE
VOLTAGE
0.1V TO V
CC
ANALOG
INPUT RANGE
–0.12V
REF
TO 1.12V
REF
2
V
REF
SCK
7
F
O
8
Total Unadjusted Error vs Output Code
10
TOTAL UNADJUSTED ERROR (ppm)
8
6
4
2
0
–2
–4
–6
–8
–10
0
V
CC
= INTERNAL OSC/50Hz REJECTION
= EXTERNAL CLOCK SOURCE
= INTERNAL OSC/60Hz REJECTION
3
4
V
IN
GND
SDO
CS
6
5
3-WIRE
SPI INTERFACE
2420 TA01
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
V
CC
= 5V
V
REF
= 5V
T
A
= 25°C
F
O
= LOW
524,288
OUTPUT CODE (DECIMAL)
1,048,575
2420 TA02
U
U
1
LTC2420
ABSOLUTE
MAXIMUM
RATINGS
(Notes 1, 2)
PACKAGE/ORDER INFORMATION
TOP VIEW
V
CC
1
V
REF
2
V
IN
3
GND 4
8
7
6
5
F
O
SCK
SDO
CS
Supply Voltage (V
CC
) to GND .......................– 0.3V to 7V
Analog Input Voltage to GND ....... – 0.3V to (V
CC
+ 0.3V)
Reference Input Voltage to GND .. – 0.3V to (V
CC
+ 0.3V)
Digital Input Voltage to GND ........ – 0.3V to (V
CC
+ 0.3V)
Digital Output Voltage to GND ..... – 0.3V to (V
CC
+ 0.3V)
Operating Temperature Range
LTC2420C ............................................... 0°C to 70°C
LTC2420I ............................................ – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART NUMBER
LTC2420CS8
LTC2420IS8
S8 PART MARKING
2420
2420I
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 125°C,
θ
JA
= 130°C/W
Consult factory for Military grade parts.
CONVERTER CHARACTERISTICS
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Notes 3, 4)
PARAMETER
Resolution (No Missing Codes)
Integral Nonlinearity
Integral Nonlinearity (Fast Mode)
Offset Error
Offset Error (Fast Mode)
Offset Error Drift
Full-Scale Error
Full-Scale Error (Fast Mode)
Full-Scale Error Drift
Total Unadjusted Error
Output Noise
Output Noise (Fast Mode)
Normal Mode Rejection 60Hz
±2%
Normal Mode Rejection 50Hz
±2%
Power Supply Rejection, DC
Power Supply Rejection, 60Hz
±2%
Power Supply Rejection, 50Hz
±2%
CONDITIONS
0.1V
≤
V
REF
≤
V
CC
, (Note 5)
V
REF
= 2.5V (Note 6)
V
REF
= 5V (Note 6)
V
REF
= 5V, V
REF
= 2.5V, 100 Samples/Second, f
O
= 2.048MHz
2.5V
≤
V
REF
≤
V
CC
2.5V < V
REF
< 5V, 100 Samples/Second, f
O
= 2.048MHz
2.5V
≤
V
REF
≤
V
CC
2.5V
≤
V
REF
≤
V
CC
2.5V < V
REF
< 5V, 100 Samples/Second, f
O
= 2.048MHz
2.5V
≤
V
REF
≤
V
CC
V
REF
= 2.5V
V
REF
= 5V
V
IN
= 0V (Note 13)
V
REF
= 5V, 100 Samples/Second, f
O
= 2.048MHz
(Note 7)
(Note 8)
V
REF
= 2.5V, V
IN
= 0V
V
REF
= 2.5V, V
IN
= 0V, (Note 7)
V
REF
= 2.5V, V
IN
= 0V, (Note 8)
q
q
q
q
q
q
q
q
MIN
20
TYP
4
8
40
0.5
3
0.04
4
10
0.04
8
16
6
20
MAX
10
20
250
10
UNITS
Bits
ppm of V
REF
ppm of V
REF
ppm of V
REF
ppm of V
REF
ppm of V
REF
ppm of V
REF
/°C
10
ppm of V
REF
ppm of V
REF
ppm of V
REF
/°C
ppm of V
REF
ppm of V
REF
µV
RMS
µV
RMS
dB
dB
dB
dB
dB
110
110
130
130
100
110
110
2
U
W
U
U
W W
W
U
LTC2420
A ALOG I PUT A D REFERE CE
SYMBOL
V
IN
V
REF
C
S(IN)
C
S(REF)
I
IN(LEAK)
I
REF(LEAK)
PARAMETER
Input Voltage Range
Reference Voltage Range
Input Sampling Capacitance
Reference Sampling Capacitance
Input Leakage Current
Reference Leakage Current
CS = V
CC
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
CONDITIONS
(Note 14)
q
q
V
REF
= 2.5V, CS = V
CC
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
V
IH
V
IL
I
IN
I
IN
C
IN
C
IN
V
OH
V
OL
V
OH
V
OL
I
OZ
PARAMETER
High Level Input Voltage
CS, F
O
Low Level Input Voltage
CS, F
O
High Level Input Voltage
SCK
Low Level Input Voltage
SCK
Digital Input Current
CS, F
O
Digital Input Current
SCK
Digital Input Capacitance
CS, F
O
Digital Input Capacitance
SCK
High Level Output Voltage
SDO
Low Level Output Voltage
SDO
High Level Output Voltage
SCK
Low Level Output Voltage
SCK
High-Z Output Leakage
SDO
(Note 9)
I
O
= – 800µA
I
O
= 1.6mA
I
O
= – 800µA (Note 10)
I
O
= 1.6mA (Note 10)
CONDITIONS
2.7V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
3.3V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
The
q
denotes specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 3)
MIN
q
q
q
q
q
q
2.7V
≤
V
CC
≤
5.5V (Note 9)
2.7V
≤
V
CC
≤
3.3V (Note 9)
4.5V
≤
V
CC
≤
5.5V (Note 9)
2.7V
≤
V
CC
≤
5.5V (Note 9)
0V
≤
V
IN
≤
V
CC
0V
≤
V
IN
≤
V
CC
(Note 9)
POWER REQUIRE E TS
SYMBOL
V
CC
I
CC
PARAMETER
Supply Voltage
Supply Current
Conversion Mode
Sleep Mode
The
q
denotes specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. (Note 3)
CONDITIONS
q
CS = 0V (Note 12)
CS = V
CC
(Note 12)
U
U W
U
U
U
U
U
MIN
– 0.125 • V
REF
0.1
TYP
MAX
1.125 • V
REF
V
CC
UNITS
V
V
pF
pF
1
1.5
q
q
– 100
– 100
1
1
100
100
nA
nA
TYP
MAX
UNITS
V
V
2.5
2.0
0.8
0.6
2.5
2.0
0.8
0.6
–10
–10
10
10
10
10
V
V
V
V
V
V
µA
µA
pF
pF
V
q
q
q
q
q
V
CC
– 0.5
0.4
V
CC
– 0.5
0.4
–10
10
V
V
V
µA
MIN
2.7
TYP
MAX
5.5
UNITS
V
µA
µA
q
q
200
20
300
30
3
LTC2420
TI I G CHARACTERISTICS
SYMBOL
f
EOSC
t
HEO
t
LEO
t
CONV
PARAMETER
External Oscillator Frequency Range
External Oscillator High Period
External Oscillator Low Period
Conversion Time
F
O
= 0V
F
O
= V
CC
External Oscillator (Note 11)
Internal Oscillator (Note 10)
External Oscillator (Notes 10, 11)
(Note 10)
(Note 9)
(Note 9)
(Note 9)
Internal Oscillator (Notes 10, 12)
External Oscillator (Notes 10, 11)
(Note 9)
q
q
q
q
q
q
q
q
The
q
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 3)
CONDITIONS
20-Bit Effective Resolution
12-Bit Effective Resolution
q
q
q
q
q
q
q
f
ISCK
D
ISCK
f
ESCK
t
LESCK
t
HESCK
t
DOUT_ISCK
t
DOUT_ESCK
t
1
t2
t3
t4
t
KQMAX
t
KQMIN
t
5
t
6
Note 1:
Absolute Maximum Ratings are those values beyond which the
life of the device may be impaired.
Note 2:
All voltage values are with respect to GND.
Note 3:
All voltages are with respect to GND. V
CC
= 2.7 to 5.5V unless
otherwise specified. R
SOURCE
= 0Ω.
Note 4:
Internal Conversion Clock source with the F
O
pin tied
to GND or to V
CC
or to external conversion clock source with
f
EOSC
= 153600Hz unless otherwise specified.
Note 5:
Guaranteed by design, not subject to test.
Note 6:
Integral nonlinearity is defined as the deviation of a code from
a straight line passing through the actual endpoints of the transfer
curve. The deviation is measured from the center of the quantization
band.
Note 7:
F
O
= 0V (internal oscillator) or f
EOSC
= 153600Hz
±2%
(external oscillator).
Note 8:
F
O
= V
CC
(internal oscillator) or f
EOSC
= 128000Hz
±2%
(external oscillator).
4
UW
MIN
2.56
2.56
0.5
0.5
TYP
MAX
307.2
2.048
390
390
UNITS
kHz
MHz
µs
µs
ms
ms
ms
kHz
kHz
130.66
133.33
136
156.80
160
163.20
20480/f
EOSC
(in kHz)
19.2
f
EOSC
/8
45
250
250
1.23
1.25
1.28
192/f
EOSC
(in kHz)
24/f
ESCK
(in kHz)
0
0
0
50
200
15
50
50
150
150
150
55
2000
Internal SCK Frequency
Internal SCK Duty Cycle
External SCK Frequency Range
External SCK Low Period
External SCK High Period
Internal SCK 24-Bit Data Output Time
External SCK 24-Bit Data Output Time
CS
↓
to SDO Low Z
CS
↑
to SDO High Z
CS
↓
to SCK
↓
CS
↓
to SCK
↑
SCK
↓
to SDO Valid
SDO Hold After SCK
↓
SCK Set-Up Before CS
↓
SCK Hold After CS
↓
%
kHz
ns
ns
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
(Note 10)
(Note 9)
(Note 5)
q
q
q
q
q
q
Note 9:
The converter is in external SCK mode of operation such that
the SCK pin is used as digital input. The frequency of the clock signal
driving SCK during the data output is f
ESCK
and is expressed in kHz.
Note 10:
The converter is in internal SCK mode of operation such that
the SCK pin is used as digital output. In this mode of operation the
SCK pin has a total equivalent load capacitance C
LOAD
= 20pF.
Note 11:
The external oscillator is connected to the F
O
pin. The external
oscillator frequency, f
EOSC
, is expressed in kHz.
Note 12:
The converter uses the internal oscillator.
F
O
= 0V or F
O
= V
CC
.
Note 13:
The output noise includes the contribution of the internal
calibration operations.
Note 14:
For reference voltage values V
REF
> 2.5V the extended input
of – 0.125 • V
REF
to 1.125 • V
REF
is limited by the absolute maximum
rating of the Analog Input Voltage pin (Pin 3). For 2.5V < V
REF
≤
0.267V + 0.89 • V
CC
the input voltage range is – 0.3V to 1.125 • V
REF
.
For 0.267V + 0.89 • V
CC
< V
REF
≤
V
CC
the input voltage range is – 0.3V
to V
CC
+ 0.3V.
LTC2420
PIN FUNCTIONS
V
CC
(Pin 1):
Positive Supply Voltage. Bypass to GND
(Pin 4) with a 10µF tantalum capacitor in parallel with
0.1µF ceramic capacitor as close to the part as possible.
V
REF
(Pin 2):
Reference Input. The reference voltage range
is 0.1V to V
CC
.
V
IN
(Pin 3):
Analog Input. The input voltage range is
– 0.125 • V
REF
to 1.125 • V
REF
. For V
REF
> 2.5V the input
voltage range may be limited by the pin absolute maxi-
mum rating of – 0.3V to V
CC
+ 0.3V.
GND (Pin 4):
Ground. Shared pin for analog ground,
digital ground, reference ground and signal ground. Should
be connected directly to a ground plane through a mini-
mum length trace or it should be the single-point-ground
in a single point grounding system.
CS (Pin 5):
Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW on CS wakes up the ADC. A
LOW-to-HIGH transition on this pin disables the SDO
digital output. A LOW-to-HIGH transition on CS during the
Data Output transfer aborts the data transfer and starts a
new conversion.
SDO (Pin 6):
Three-State Digital Output. During the data
output period this pin is used for serial data output. When
the chip select CS is HIGH (CS = V
CC
), the SDO pin is in a
high impedance state. During the Conversion and Sleep
periods, this pin can be used as a conversion status out-
put. The conversion status can be observed by pulling CS
LOW.
SCK (Pin 7):
Bidirectional Digital Clock Pin. In Internal
Serial Clock Operation mode, SCK is used as digital output
for the internal serial interface clock during the data output
period. In External Serial Clock Operation mode, SCK is
used as digital input for the external serial interface. A
weak internal pull-up is automatically activated in Internal
Serial Clock Operation mode. The Serial Clock mode is
determined by the level applied to SCK at power up and the
falling edge of CS.
F
O
(Pin 8):
Frequency Control Pin. Digital input that
controls the ADC’s notch frequencies and conversion
time. When the F
O
pin is connected to V
CC
(F
O
= V
CC
), the
converter uses its internal oscillator and the digital filter’s
first null is located at 50Hz. When the F
O
pin is connected
to GND (F
O
= OV) the converter uses its internal oscillator
and the digital filter first null is located at 60Hz. When F
O
is driven by an external clock signal with a frequency f
EOSC
,
the converter uses this signal as its clock and the digital
filter first null is located at a frequency f
EOSC
/2560.
APPLICATIO S I FOR ATIO
The LTC2420 is pin compatible with the LTC2400. The two
devices are designed to allow the user to incorporate
either device in the same design with no modifications.
While the LTC2420 output word length is 24 bits (as
opposed to the 32-bit output of the LTC2400), its output
clock timing can be identical to the LTC2400. As shown in
Figure 1, the LTC2420 data output is concluded on the
falling edge of the 24th serial clock (SCK). In order to
maintain drop-in compatibility with the LTC2400, it is
possible to clock the LTC2420 with an additional 8 serial
clock pulses. This results in 8 additional output bits which
are always logic HIGH.
U
W
U
U
U
U
U
Output Data Format
The LTC2420 serial output data stream is 24 bits long. The
first 4 bits represent status information indicating the
sign, input range and conversion state. The next 20 bits are
the conversion result, MSB first.
Bit 23 (first output bit) is the end of conversion (EOC)
indicator. This bit is available at the SDO pin during the
conversion and sleep states whenever the CS pin is LOW.
This bit is HIGH during the conversion and goes LOW
when the conversion is complete.
Bit 22 (second output bit) is a dummy bit (DMY) and is
always LOW.
5
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