LTC2606/LTC2616/LTC2626
16-/14-/12-Bit Rail-to-Rail DACs
with I
2
C Interface
FEATURES
■
DESCRIPTIO
■
■
■
■
■
■
■
■
■
■
■
■
Smallest Pin-Compatible Single DACs:
LTC2606: 16 Bits
LTC2616: 14 Bits
LTC2626: 12 Bits
Guaranteed 16-Bit Monotonic Over Temperature
27 Selectable Addresses
400kHz I
2
C
TM
Interface
Wide 2.7V to 5.5V Supply Range
Low Power Operation: 270µA at 3V
Power Down to 1µA, Max
High Rail-to-Rail Output Drive (±15mA, Min)
Double-Buffered Data Latches
Asynchronous DAC Update Pin
LTC2606/LTC2616/LTC2626: Power-On Reset to
Zero Scale
LTC2606-1/LTC2616-1/LTC2626-1: Power-On Reset
to Midscale
Tiny (3mm
×
3mm) 10-Lead DFN Package
The LTC
®
2606/LTC2616/LTC2626 are single 16-, 14-
and 12-bit, 2.7V-to-5.5V rail-to-rail voltage output DACs
in a 10-lead DFN package. They have built-in high perfor-
mance output buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive and load regulation in single-supply,
voltage-output DACs.
The parts use a 2-wire, I
2
C compatible serial interface. The
LTC2606/LTC2616/LTC2626 operate in both the standard
mode (clock rate of 100kHz) and the fast mode (clock rate
of 400kHz). An asynchronous DAC update pin (LDAC) is
also included.
The LTC2606/LTC2616/LTC2626 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise less
than 10mV above zero scale; and after power-up, they stay
at zero scale until a valid write and update take place. The
power-on reset circuit resets the LTC2606-1/LTC2616-1/
LTC2626-1 to midscale. The voltage outputs stay at
midscale until a valid write and update take place.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
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Mobile Communications
Process Control and Industrial Automation
Instrumentation
Automatic Test Equipment
BLOCK DIAGRA
SCL
9
V
CC
6
REF
3
INPUT
REGISTER
I
2
C
INTERFACE
SDA
DAC
REGISTER
16-BIT DAC
V
OUT
7
2
CONTROL
LOGIC
DNL (LSB)
4
5
1
CA0
CA1
CA2
I
2
C
ADDRESS
DECODE
LDAC
10
GND
8
2606 BD
U
Differential Nonlinearity
(LTC2606)
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2606 G02
W
U
V
CC
= 5V
V
REF
= 4.096V
26061626f
1
LTC2606/LTC2616/LTC2626
ABSOLUTE
AXI U
RATI GS
(Note 1)
Operating Temperature Range:
LTC2606C/LTC2616C/LTC2626C
LTC2606-1C/LTC2616-1C/LTC2626-1C ... 0°C to 70°C
LTC2606I/LTC2616I/LTC2626I
LTC2606-1I/LTC2616-1I/LTC2626-1I .. – 40°C to 85°C
Any Pin to GND ........................................... – 0.3V to 6V
Any Pin to V
CC
.............................................– 6V to 0.3V
Maximum Junction Temperature ......................... 125°C
Storage Temperature Range ................ – 65°C to 125°C
Lead Temperature (Soldering, 10 sec)................ 300°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
CA2
SDA
SCL
CA0
CA1
1
2
3
4
5
11
10 LDAC
9 V
CC
8 GND
7 V
OUT
6 REF
ORDER PART
NUMBER
LTC2606CDD
LTC2606IDD
LTC2606CDD-1
LTC2606IDD-1
DD PART MARKING
LAJX
LAJW
DD PACKAGE
10-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 11) IS GND
MUST BE SOLDERED TO PCB
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
●
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), V
OUT
unloaded,
unless otherwise noted.
SYMBOL PARAMETER
DC Performance
Resolution
Monotonicity
DNL
Differential Nonlinearity
INL
Integral Nonlinearity
Load Regulation
CONDITIONS
●
ELECTRICAL CHARACTERISTICS
ZSE
V
OS
GE
Zero-Scale Error
Offset Error
V
OS
Temperature
Coefficient
Gain Error
Gain Temperature
Coefficient
(Note 2)
(Note 2)
(Note 2)
V
REF
= V
CC
= 5V, Midscale
I
OUT
= 0mA to 15mA Sourcing
I
OUT
= 0mA to 15mA Sinking
V
REF
= V
CC
= 2.7V, Midscale
I
OUT
= 0mA to 7.5mA Sourcing
I
OUT
= 0mA to 7.5mA Sinking
Code = 0
(Note 5)
2
U
U
W
W W
U
W
ORDER PART
NUMBER
LTC2616CDD
LTC2616IDD
LTC2616CDD-1
LTC2616IDD-1
DD PART MARKING
LBPQ
LBPR
ORDER PART
NUMBER
LTC2626CDD
LTC2626IDD
LTC2626CDD-1
LTC2626IDD-1
DD PART MARKING
LBPS
LBPT
LTC2626/LTC2626-1 LTC2616/LTC2616-1 LTC2606/LTC2606-1
MIN TYP MAX MIN TYP MAX MIN TYP MAX
12
12
±1
±0.5
±4
14
14
±4
0.1
0.2
0.2
0.4
1
±1
±5
±1
±16
0.5
0.5
1
1
9
±9
16
16
±14
0.5
0.7
0.9
1.5
1
±1
±5
±1
±64
2
2
4
4
9
±9
UNITS
Bits
Bits
LSB
LSB
LSB/mA
LSB/mA
LSB/mA
LSB/mA
mV
mV
µV/°C
%FSR
ppm/°C
●
●
●
●
●
●
●
●
●
0.025 0.125
0.05 0.125
0.05
0.1
1
±1
±5
0.25
0.25
9
±9
●
±0.1 ±0.7
±8.5
±0.1 ±0.7
±8.5
±0.1 ±0.7
±8.5
26061626f
LTC2606/LTC2616/LTC2626
The
●
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), V
OUT
unloaded,
unless otherwise noted. (Note 11)
SYMBOL
PSR
R
OUT
I
SC
PARAMETER
Power Supply Rejection
DC Output Impedance
Short-Circuit Output Current
CONDITIONS
V
CC
=
±10%
V
REF
= V
CC
= 5V, Midscale; –15mA
≤
I
OUT
≤
15mA
V
REF
= V
CC
= 2.7V, Midscale; –7.5mA
≤
I
OUT
≤
7.5mA
V
CC
= 5.5V, V
REF
= 5.5V
Code: Zero Scale; Forcing Output to V
CC
Code: Full Scale; Forcing Output to GND
V
CC
= 2.7V, V
REF
= 2.7V
Code: Zero Scale; Forcing Output to V
CC
Code: Full Scale; Forcing Output to GND
●
●
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
MIN
TYP
–81
0.05
0.06
MAX
0.15
0.15
60
60
50
50
V
CC
160
1
5.5
0.5
0.4
1
1
0.3V
CC
UNITS
dB
Ω
Ω
mA
mA
mA
mA
V
kΩ
pF
µA
V
mA
mA
µA
µA
V
V
15
15
7.5
7.5
0
88
34
36
22
29
Reference Input
Input Voltage Range
Resistance
Capacitance
I
REF
Reference Current, Power Down Mode
Power Supply
V
CC
Positive Supply Voltage
I
CC
Supply Current
Normal Mode
DAC Powered Down
For Specified Performance
V
CC
= 5V (Note 3)
V
CC
= 3V (Note 3)
DAC Powered Down (Note 3) V
CC
= 5V
DAC Powered Down (Note 3) V
CC
= 3V
●
●
●
●
●
●
●
●
124
15
0.001
2.7
0.340
0.27
0.35
0.10
–0.5
0.7V
CC
Digital I/O (Note 11)
V
IL
Low Level Input Voltage
(SDA and SCL)
V
IH
High Level Input Voltage
(SDA and SCL)
V
IL(LDAC)
Low Level Input Voltage (LDAC)
V
IH(LDAC)
V
IL(CAn)
V
IH(CAn)
R
INH
R
INL
R
INF
V
OL
t
OF
t
SP
I
IN
C
IN
C
B
C
CAX
High Level Input Voltage (LDAC)
Low Level Input Voltage on CAn
(n = 0, 1, 2)
High Level Input Voltage on CAn
(n = 0, 1, 2)
Resistance from CAn (n = 0, 1, 2)
to V
CC
to Set CAn = V
CC
Resistance from CAn (n = 0, 1, 2)
to GND to Set CAn = GND
Resistance from CAn (n = 0, 1, 2)
to V
CC
or GND to Set CAn = Float
Low Level Output Voltage
Output Fall Time
Pulse Width of Spikes Suppressed
by Input Filter
Input Leakage
I/O Pin Capacitance
Capacitive Load for Each Bus Line
External Capacitive Load on Address
Pins CAn (n = 0, 1, 2)
(Note 8)
V
CC
= 4.5V to 5.5V
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 3.6V
See Test Circuit 1
See Test Circuit 1
See Test Circuit 2
See Test Circuit 2
See Test Circuit 2
Sink Current = 3mA
V
O
= V
IH(MIN)
to V
O
= V
IL(MAX)
,
C
B
= 10pF to 400pF (Note 9)
●
●
●
●
●
●
●
●
●
●
●
0.8
0.6
2.4
2.0
0.15V
CC
0.85V
CC
10
10
2
0.4
250
50
1
10
400
10
V
V
V
V
V
V
kΩ
kΩ
MΩ
V
ns
ns
µA
pF
pF
pF
26061626f
0
●
20 + 0.1C
B
●
0
0.1V
CC
≤
V
IN
≤
0.9V
CC
●
●
●
●
3
LTC2606/LTC2616/LTC2626
The
●
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), V
OUT
unloaded,
unless otherwise noted.
SYMBOL PARAMETER
AC Performance
t
S
Settling Time (Note 6)
±0.024%
(±1LSB at 12 Bits)
±0.006%
(±1LSB at 14 Bits)
±0.0015%
(±1LSB at 16 Bits)
±0.024%
(±1LSB at 12 Bits)
±0.006%
(±1LSB at 14 Bits)
±0.0015%
(±1LSB at 16 Bits)
7
7
9
2.7
4.8
0.75
1000
12
180
120
100
15
7
9
10
2.7
4.8
5.2
0.75
1000
12
180
120
100
15
µs
µs
µs
µs
µs
µs
V/µs
pF
nV • s
kHz
nV/√Hz
nV/√Hz
µV
P-P
CONDITIONS
LTC2626/LTC2626-1 LTC2616/LTC2616-1 LTC2606/LTC2606-1
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
ELECTRICAL CHARACTERISTICS
Settling Time for 1LSB Step
(Note 7)
Voltage Output Slew Rate
Capacitive Load Driving
Glitch Impulse
Multiplying Bandwidth
e
n
Output Voltage Noise Density
Output Voltage Noise
2.7
0.75
1000
At Midscale Transition
At f = 1kHz
At f = 10kHz
0.1Hz to 10Hz
12
180
120
100
15
The
●
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (See Figure 1) (Notes 10, 11)
SYMBOL PARAMETER
V
CC
= 2.7V to 5.5V
f
SCL
SCL Clock Frequency
t
HD(STA)
Hold Time (Repeated) Start Condition
t
LOW
Low Period of the SCL Clock Pin
t
HIGH
High Period of the SCL Clock Pin
t
SU(STA)
Set-Up Time for a Repeated Start Condition
t
HD(DAT)
Data Hold Time
t
SU(DAT)
Data Set-Up Time
t
r
Rise Time of Both SDA and SCL Signals
t
f
Fall Time of Both SDA and SCL Signals
t
SU(STO)
Set-Up Time for Stop Condition
t
BUF
Bus Free Time Between a Stop and Start Condition
t
1
Falling Edge of 9th Clock of the 3rd Input Byte
to LDAC High or Low Transition
t
2
LDAC Low Pulse Width
CONDITIONS
●
●
●
●
●
●
●
TI I G CHARACTERISTICS
Note 1:
Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2:
Linearity and monotonicity are defined from code k
L
to code
2
N
– 1, where N is the resolution and k
L
is given by k
L
= 0.016(2
N
/V
REF
),
rounded to the nearest whole code. For V
REF
= 4.096V and N = 16, k
L
=
256 and linearity is defined from code 256 to code 65,535.
Note 3:
Digital inputs at 0V or V
CC
.
Note 4:
Guaranteed by design and not production tested.
Note 5:
Inferred from measurement at code 256 (LTC2606/LTC2606-1),
code 64 (LTC2616/LTC2616-1) or code 16 (LTC2626/LTC2626-1) and at
full scale.
4
UW
MIN
0
0.6
1.3
0.6
0.6
0
100
20 + 0.1C
B
20 + 0.1C
B
0.6
1.3
400
20
TYP
MAX
400
UNITS
kHz
µs
µs
µs
µs
µs
ns
ns
ns
µs
µs
ns
ns
0.9
300
300
(Note 9)
(Note 9)
●
●
●
●
●
●
Note 6:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped 1/4 scale to 3/4 scale
and 3/4 scale to 1/4 scale. Load is 2k in parallel with 200pF to GND.
Note 7:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped
±1LSB
between half
scale and half scale – 1. Load is 2k in parallel with 200pF to GND.
Note 8:
Maximum V
IH
= V
CC(MAX)
+ 0.5V
Note 9:
C
B
= capacitance of one bus line in pF.
Note 10:
All values refer to V
IH(MIN)
and V
IL(MAX)
levels.
Note 11:
These specifications apply to LTC2606/LTC2606-1,
LTC2616/LTC2616-1, LTC2626/LTC2626-1.
26061626f
LTC2606/LTC2616/LTC2626
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2606
Integral Nonlinearity (INL)
32
24
16
DNL (LSB)
INL (LSB)
8
0
–8
–16
–24
–32
0
16384
32768
CODE
49152
65535
2606 G01
V
CC
= 5V
V
REF
= 4.096V
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2606 G02
INL (LSB)
DNL vs Temperature
1.0
0.8
0.6
16
0.4
DNL (LSB)
0.2
0
–0.2
–0.4
–16
–0.6
–0.8
–1.0
–50
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
–24
–32
DNL (NEG)
DNL (POS)
INL (LSB)
V
CC
= 5V
V
REF
= 4.096V
0
–8
INL (NEG)
DNL (LSB)
Settling to
±1LSB
V
OUT
100µV/DIV
9TH CLOCK
OF 3RD DATA
BYTE
9.7µs
SCL
2V/DIV
V
CC
= 5V, V
REF
= 4.096V
1/4-SCALE TO 3/4-SCALE STEP
R
L
= 2k, C
L
= 200pF
AVERAGE OF 2048 EVENTS
U W
2606 G04
Differential Nonlinearity (DNL)
1.0
0.8
0.6
0.4
0.2
16
8
0
–8
–16
–24
V
CC
= 5V
V
REF
= 4.096V
32
24
INL vs Temperature
V
CC
= 5V
V
REF
= 4.096V
INL (POS)
INL (NEG)
–32
–50
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
2606 G03
INL vs V
REF
32
24
V
CC
= 5.5V
1.5
1.0
INL (POS)
0.5
DNL vs V
REF
V
CC
= 5.5V
8
DNL (POS)
0
DNL (NEG)
–0.5
–1.0
–1.5
0
1
2
3
V
REF
(V)
4
5
2606 G05
0
1
2
3
V
REF
(V)
4
5
2606 G06
Settling of Full-Scale Step
V
OUT
100µV/DIV
12.3µs
9TH CLOCK OF
3RD DATA BYTE
SCR
2V/DIV
2µs/DIV
2606 G07
5µs/DIV
SETTLING TO
±1LSB
V
CC
= 5V, V
REF
= 4.096V
CODE 512 TO 65535 STEP
AVERAGE OF 2048 EVENTS
2606 G08
26061626f
5
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