Product Brief
June 2005
ET4028-50
Single-Chip 28 x 1 Gbit/s Layer 2+ Ethernet Switch
Jumbo frame size up to 16 KB
Advanced traffic management functions:
— No head-of-line blocking
— 802.3x flow control
— Traffic shaping and scheduling
— Traffic policing
— Broadcast/multicast storm control
— Eight queues per port
Link aggregation and mirroring
525-FCBGA package
Benefits
True switch-on-a-chip technology enables system ven-
dors to build competitive 28-port Ethernet switches
Integrated memories and SerDes ports for lower system
power, cost, and PCB area.
Features
Twenty-four 10/100/1000 Mbits/s Ethernet Ports with
SGMII interfaces
Four 1000 Mbits/s SerDes ports
Aggregate 42 Mpackets/s switching capacity (wire speed
operation)
32-bit, 66 MHz
PCI
™ processor interface
Two MDIO interfaces
Integrated packet buffer memory
Integrated address table memories:
— 8192 Layer 2 MAC addresses
Full
IEEE
®
Flexible L2/L3/L4 ACL supporting enhanced network
security
Supports native IPv4 and IPv6 prefix and host address
matches
Comprehensive QoS features and wire speed perfor-
mance supporting enterprise desktop aggregation
switching application
Seamless interface and common API with Agere
True-
PHY™
multiport PHY
Target Applications
Fully managed L2+ gigabit Ethernet desktop switches
Twenty-four-port gigabit Ethernet switch in stand-alone
configuration
Twenty-four-port gigabit Ethernet switch with four fiber
ports in stand-alone configuration
High-density gigabit Ethernet fabric switches
802.1D bridging
Extensive VLAN support:
— Port-based VLANs
— Port-/protocol-based VLANs
— 4K VLAN IDs, 256 active VLANs
— Per VLAN rapid-spanning tree
L2/L3/L4 classification for access control list (ACL) and
quality of service (QoS)
ET4028-50
Single-Chip 28 x 1 Gbit/s Layer 2+ Ethernet Switch
Product Brief
June 2005
Description
The ET4028-50 is part of Agere’s FMS gigabit Ethernet
switch product family. The ET4028-50 is a highly inte-
grated and fully featured Layer 2 Ethernet bridge with
integrated MACs, packet buffers, and address tables.
When combined with three ET1081 Octal PHYs, the
ET4028-50 enables the implementation of a minimal
component system that translates to low cost and high
reliability. The ET4028-50 contains 28
IEEE
compliant
802.3z 10/100/1000 Mbits/s Ethernet MACs. Twenty-
four of the MACs connect to external ET1081 Octal
PHYs via 6-pin LVDS SGMII interfaces. Four of the
MACs can be connected to external fiber PHYs via
SerDes interfaces.
The ET4028-50 features an integrated L2/L3/L4 packet
classification engine. The result of each packet classifi-
cation is used to determine the packet’s quality of ser-
vice treatment and access control. Access to network
by individual desktops can be controlled by L2 MAC
address and TCP/IP layer provisioning. Each port sup-
ports up to eight traffic class queues. Each packet is
assigned to a class queue based on the 802.1p coding
or IP TOS/DSCP. Incoming traffic is policed to ensure
the optimum use of network resources. Outgoing traffic
is scheduled or shaped according to the traffic class
and network resource usage.
Integrated address tables and packet buffers enable
full bandwidth bridging on all ports with any legitimate
frame length. All internal operations are at wire speed.
A reference system design kit is available for the
ET4028-50. For more detailed product and reference
design information, please contact Agere’s local sales
office.
Block Diagram
PCI
Integrated
Packet Buffer
Packet
Processor
10/100/
1000M MAC
x28
Supervisor
L2
L2 LKP
Look-up
L2/L3/L4
Classifier
4xSerDes
24xSGMII
2xMDIO
System Diagram
24-Port Switch
-
24 10/100/1000M Copper Ethernet Ports
28-Port Switch
-
24 10/100/1000M Copper Ethernet Ports
-
4 GbE Fiber Ports
4xSerDes IF
PCI
PCI
1G Fiber
ET4028-50
ET4028-50
1G Fiber
1G Fiber
1G Fiber
Processor
24xSGMII
ET1081
ET1081
ET1081
2xMDIO
Processor
24xSGMII
ET1081
ET1081
ET1081
2xMDIO
2
Agere Systems Inc.
ET4028-50
Single-Chip 28 x 1 Gbit/s Layer 2+ Ethernet Switch
Product Brief
June 2005
Ordering Information
Device
ET40428-50
ET40428-50
Description
Part Number
Comcode
700079715
700079857
Single-Chip 28 x 1 Gbit/s Layer 2+ Ethernet Switch ET4028-50--DB
Lead-Free Single-Chip 28 x 1 Gbit/s Layer 2+
L-ET4028-50--DB
Ethernet Switch
Related Documentation
Device
ET1011
ET1310
ET1081
ET4048-50
ET4128-50
ET4148-50
ET3028-50
ET3048-50
Gigabit Ethernet Transceiver
Gigabit Ethernet Controller
Gigabit Ethernet Octal PHY
Single-Chip 48 x 1 Gbit/s Layer 2+ Ethernet Switch
Single-Chip 28 x 1 Gbit/s + 2x 10 Gbits/s Layer 2+ Ethernet Switch
Single-Chip 48 x 1 Gbit/s + 2x 10 Gbits/s Layer 2+ Ethernet Switch
Single-Chip 28 x 1 Gbit/s Layer 2 Ethernet Switch
Single-Chip 48 x 1 Gbit/s Layer 2 Ethernet Switch
Description
Document Type
Product Brief
Data Sheet
Application Note
Product Brief
Data Sheet
Product Brief
Data Sheet
Application Note
PCI
is a trademark of PCI-SIG Corporation.
IEEE
is a registered trademark of the Institute of Electrical and Electronics Engineers, Inc.
For additional information, contact your Agere Systems Account Manager or the following:
INTERNET:
Home:
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E-MAIL:
docmaster@agere.com
N. AMERICA: Agere Systems Inc., Lehigh Valley Central Campus, Room 10A-301C, 1110 American Parkway NE, Allentown, PA 18109-9138
1-800-372-2447,
FAX 610-712-4106 (In CANADA:
1-800-553-2448,
FAX 610-712-4106)
ASIA:
CHINA:
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(Shanghai),
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(Tokyo), KOREA:
(82) 2-767-1850
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(65) 6741-9855,
TAIWAN:
(886) 2-2725-5858
(Taipei)
EUROPE:
Tel. (44) 1344 296 400
Agere Systems Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application.
Agere, Agere Systems, and the Agere logo are registered trademarks of Agere Systems Inc.
Copyright © 2005 Agere Systems Inc.
All Rights Reserved
June 2005
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