Datasheet> 器件分类 > 逻辑> 逻辑> 5962R9662101TXC

文档预览

5962R9662101TXC: 产品描述4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDFP14, CERAMIC, DFP-14; 产品类别逻辑逻辑; 文件大小30KB，共3页; 制造商Renesas(瑞萨电子); 官网地址https://www.renesas.com/

下载文档详细参数选型对比全文预览

5962R9662101TXC概述

4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDFP14, CERAMIC, DFP-14

5962R9662101TXC规格参数

参数名称	属性值
零件包装代码	DFP
包装说明	DFP, FL14,.3
针数	14
Reach Compliance Code	unknown
系列	4000/14000/40000
JESD-30 代码	R-CDFP-F14
JESD-609代码	e4
负载电容（CL）	50 pF
逻辑集成电路类型	NAND GATE
最大I（ol）	0.00064 A
功能数量	4
输入次数	2
端子数量	14
最高工作温度	125 °C
最低工作温度	-55 °C
封装主体材料	CERAMIC, METAL-SEALED COFIRED
封装代码	DFP
封装等效代码	FL14,.3
封装形状	RECTANGULAR
封装形式	FLATPACK
电源	5/15 V
Prop。Delay @ Nom-Sup	338 ns
认证状态	Not Qualified
施密特触发器	NO
筛选级别	MIL-PRF-38535 Class T
座面最大高度	2.92 mm
标称供电电压 (Vsup)	5 V
表面贴装	YES
技术	CMOS
温度等级	MILITARY
端子面层	GOLD
端子形式	FLAT
端子节距	1.27 mm
端子位置	DUAL
总剂量	100k Rad(Si) V
宽度	6.285 mm
Base Number Matches	1

文档预览

下载PDF文档

全文
预览

CD4011BT

Data Sheet

July 1999

File Number

4620.1

CMOS Quad 2-Input NAND Gate

Intersil’s Satellite Applications Flow

(SAF) devices are fully

tested and guaranteed to 100kRAD total dose. These QML

Class T devices are processed to a standard ﬂow intended

to meet the cost and shorter lead-time needs of large

volume satellite manufacturers, while maintaining a high

level of reliability.

The CD4011BT, Quad 2-Input NAND gate provides the

system designer with direct implementation of the NAND

function and supplements the existing family of CMOS

gates. All inputs and outputs are buffered.

Features

• QML Class T, Per MIL-PRF-38535

• Radiation Performance

- Gamma Dose (γ) 1 x 10

RAD(Si)

- SEP Effective LET > 75 MEV/gm/cm

• Propagation Delay Time = 60ns (typ.) at CL = 50pF,

= 10V

• Buffered Inputs and Outputs

• Standardized Symmetrical Output Characteristics

• 100% Tested for Maximum Quiescent Current at 20V

Speciﬁcations

Speciﬁcations for Rad Hard QML devices are controlled by

the Defense Supply Center in Columbus (DSCC). The SMD

numbers listed below must be used when ordering.

Detailed Electrical Speciﬁcations for the CD4011BT are

contained in SMD 5962-96621.

A “hot-link” is provided from

our website for downloading.

www.intersil.com/quality/manuals.asp

Intersil’s Quality Management Plan (QM Plan), listing all

Class T screening operations, is also available on our

website.

www.intersil.com/quality/manuals.asp

• 5V, 10V and 15V Parametric Ratings

Pinouts

CD4011BT (SBDIP), CDIP2-T14

TOP VIEW

A 1

B 2

J = AB 3

K = CD 4

C 5

D 6

14 V

13 H

12 G

11 M = GH

10 L = EF

9 E

8 F

Ordering Information

ORDERING

NUMBER

5962R9662101TCC

5962R9662101TXC

PART

NUMBER

CD4011BDTR

CD4011BKTR

TEMP.

RANGE

(

-55 to 125

J = AB

K = CD

CD4011BT (FLATPACK), CDFP3-F14

TOP VIEW

M = GH

L = EF

NOTE:

Minimum order quantity for -T is 150 units through

distribution, or 450 units direct.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

www.intersil.com or 407-727-9207

Intersil Corporation 1999

5962R9662101TXC相似产品对比

	5962R9662101TXC	CD4011BKTR	5962R9662101TCC	CD4011BDTR
描述	4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDFP14, CERAMIC, DFP-14	4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDFP14, CERAMIC, DFP-14	4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDIP14, SIDE BRAZED, CERAMIC, DIP-14	4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDIP14, SIDE BRAZED, CERAMIC, DIP-14
零件包装代码	DFP	DFP	DIP	DIP
包装说明	DFP, FL14,.3	DFP, FL14,.3	DIP, DIP14,.3	DIP, DIP14,.3
针数	14	14	14	14
Reach Compliance Code	unknown	not_compliant	unknown	not_compliant
系列	4000/14000/40000	4000/14000/40000	4000/14000/40000	4000/14000/40000
JESD-30 代码	R-CDFP-F14	R-CDFP-F14	R-CDIP-T14	R-CDIP-T14
JESD-609代码	e4	e0	e4	e0
负载电容（CL）	50 pF	50 pF	50 pF	50 pF
逻辑集成电路类型	NAND GATE	NAND GATE	NAND GATE	NAND GATE
最大I（ol）	0.00064 A	0.00064 A	0.00064 A	0.00064 A
功能数量	4	4	4	4
输入次数	2	2	2	2
端子数量	14	14	14	14
最高工作温度	125 °C	125 °C	125 °C	125 °C
最低工作温度	-55 °C	-55 °C	-55 °C	-55 °C
封装主体材料	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
封装代码	DFP	DFP	DIP	DIP
封装等效代码	FL14,.3	FL14,.3	DIP14,.3	DIP14,.3
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	FLATPACK	FLATPACK	IN-LINE	IN-LINE
电源	5/15 V	5/15 V	5/15 V	5/15 V
Prop。Delay @ Nom-Sup	338 ns	338 ns	338 ns	338 ns
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified
施密特触发器	NO	NO	NO	NO
筛选级别	MIL-PRF-38535 Class T	MIL-PRF-38535 Class T	MIL-PRF-38535 Class T	MIL-PRF-38535 Class T
座面最大高度	2.92 mm	2.92 mm	5.08 mm	5.08 mm
标称供电电压 (Vsup)	5 V	5 V	5 V	5 V
表面贴装	YES	YES	NO	NO
技术	CMOS	CMOS	CMOS	CMOS
温度等级	MILITARY	MILITARY	MILITARY	MILITARY
端子面层	GOLD	Tin/Lead (Sn/Pb)	GOLD	Tin/Lead (Sn/Pb)
端子形式	FLAT	FLAT	THROUGH-HOLE	THROUGH-HOLE
端子节距	1.27 mm	1.27 mm	2.54 mm	2.54 mm
端子位置	DUAL	DUAL	DUAL	DUAL
总剂量	100k Rad(Si) V	100k Rad(Si) V	100k Rad(Si) V	100k Rad(Si) V
宽度	6.285 mm	6.285 mm	7.62 mm	7.62 mm
Base Number Matches	1	1	1	-
厂商名称	-	Renesas(瑞萨电子)	Renesas(瑞萨电子)	Renesas(瑞萨电子)

5962R9662101TXC

5962R9662101TXC概述

5962R9662101TXC规格参数

文档预览

5962R9662101TXC相似产品对比

推荐资源