IDT74FCT161AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
SYNCHRONOUS
PRESETTABLE
BINARY COUNTER
.EATURES:
•
•
•
•
A and C grades
Low input and output
≤
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Power off disable outputs permit "live insertion"
Available in SOIC and QSOP packages
IDT74FCT161AT/CT
DESCRIPTION:
The IDT74FCT161T is a high-speed synchronous modulo-16 binary
counter built using an advanced dual metal CMOS technology. It is
synchronously presettable for application in programmable dividers and
has two types of count enable inputs plus a terminal count output for versatility
in forming synchronous multi-stage counters. The IDT74FCT161T has
asynchronous Master Reset inputs that override all other inputs and force
the outputs low.
•
•
•
•
.UNCTIONAL BLOCK DIAGRAM
P
0
PE
P
1
P
2
P
3
CEP
CET
TC
CP
CP
CP
D CP
C
D
Q
D
Q
Q
0
DETAIL
A
DETAIL
A
DETAIL
A
3
0
DETAIL A
MR
Q
0
Q
1
Q
2
Q
3
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2002 Integrated Device Technology, Inc.
MARCH 2002
DSC-5504/2
IDT74FCT161AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
PIN CON.IGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
T
STG
I
OUT
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
MR
CP
P
0
P
1
P
2
P
3
CEP
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
TC
Q
0
Q
1
Q
2
Q
3
CET
PE
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
SOIC/ QSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
CEP
CET
CP
MR
P
0-3
PE
Q
0-3
TC
Description
Count Enable Parallel Input
Count Enable Trickle Input
Clock Pulse Input (Active Rising Edge)
Asynchronous Master Reset Input (Active LOW)
Parallel Data Inputs
Parallel Enable Input (Active LOW)
Flip-Flop Outputs
Terminal Count Output
.UNCTION TABLE
(1)
PE
X
L
H
H
H
CET
X
X
H
L
X
CEP
X
X
H
X
L
Action on the Rising
Clock Edge(s)
Reset (Clear)
Load (Px→Qx)
Count (Increment)
No Change (Hold)
No Change (Hold)
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
2
IDT74FCT161AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ± 5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
I
V
IK
I
OS
V
OH
V
OL
V
H
I
CC
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
Input HIGH Current
(4)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
Output LOW Voltage
Input Hysteresis
Quiescent Power
Supply Current
Test Conditions
(1)
Guaranteed Logic HIGH Level
(5)
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
—
V
CC
= Max.
V
IN
= GND or V
CC
I
OH
= –8mA
I
OH
= –15mA
I
OL
= 48mA
V
I
= 2.7V
V
I
= 0.5V
Min.
2V
—
—
—
—
—
–60
2.4
2
—
—
—
Typ.
(2)
—
—
—
—
—
–0.7
–120
3.3
3
0.3
200
0.01
Max.
—
0.8
±1
±1
±1
–1.2
–225
—
—
0.5
—
1
Unit
V
V
µA
µA
µA
V
mA
V
V
mV
mA
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
A
= –55°C.
5. Clock pin requires a minimum V
IH
of 2.5V.
3
IDT74FCT161AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max., Outputs Open
Load Mode
CEP = CET =
PE
= GND
MR
= V
CC
One Input Toggling
50% Duty Cycle
V
CC
= Max., Outputs Open
Load Mode
f
CP
= 10MHz
50% Duty Cycle
CEP = CET =
PE
= GND
MR
= V
CC
One Bit Toggling
at f
i
= 5MHz
50% Duty Cycle
V
CC
= Max., Outputs Open
Load Mode
f
CP
= 10MHz
50% Duty Cycle
CEP = CET =
PE
= GND
MR
= V
CC
Four Bits Toggling
at f
i
= 5MHz
50% Duty Cycle
V
IN
= V
CC
V
IN
= GND
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2
0.25
Unit
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
—
1.5
3.5
mA
V
IN
= 3.4V
V
IN
= GND
—
2
5.5
V
IN
= V
CC
V
IN
= GND
—
3.8
7.3
(5)
V
IN
= 3.4V
V
IN
= GND
—
5
12.3
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP/
2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
4
IDT74FCT161AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT74FCT161AT
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
t
PHL
t
SU
t
H
t
SU
t
H
t
SU
t
H
t
W
t
W
t
PHL
t
PHL
Parameter
Propagation Delay
CP to Qx (PE Input HIGH)
Propagation Delay
CP to Qx (PE Input LOW)
Propagation Delay
CP to TC
Propagation Delay
CET to TC
Propagation Delay
MR
to Qx
Propagation Delay
MR
to TC
Set-up Time, HIGH or LOW, Px to CP
Hold Time, HIGH or LOW, Px to CP
Set-up Time, HIGH or LOW,
PE
or
SR
to CP
Hold Time, HIGH or LOW,
PE
or
SR
to CP
Set-up Time, HIGH or LOW, CEP or CET to CP
Hold Time, HIGH or LOW, CEP or CET to CP
Clock Pulse, Width (Load) HIGH or LOW
Clock Pulse, Width (Count) HIGH or LOW
MR
Pulse Width LOW
Recovery Time
MR
to CP
Condition
(1)
IDT74FCT161CT
Min.
(2)
2
2
2
1.5
2
2
4
1.5
9.5
1.5
9.5
0
4
(3)
6
4
(3)
5
Max.
5.8
5.8
7.4
5.2
6
7
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Min.
(2)
2
2
2
1.5
2
2
4
1.5
9.5
1.5
9.5
0
4
(3)
6
4
(3)
5
Max.
7.2
6.2
9.8
5.5
8.5
7.5
—
—
—
—
—
—
—
—
—
—
C
L
= 50pF
R
L
= 500Ω
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This limit is guaranteed but not tested.
5
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