H8/3814 Series
H8/3814
HD6433814, HD6433814S
H8/3813
HD6433813, HD6433813S
H8/3812
HD6433812, HD6433812S
Hardware Manual
Notice
When using this document, keep the following in mind:
1. This document may, wholly or partially, be subject to change without notice.
2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the
whole or part of this document without Hitachi’s permission.
3. Hitachi will not be held responsible for any damage to the user that may result from
accidents or any other reasons during operation of the user’s unit according to this document.
4. Circuitry and other examples described herein are meant merely to indicate the
characteristics and performance of Hitachi’s semiconductor products. Hitachi assumes no
responsibility for any intellectual property claims or other problems that may result from
applications based on the examples described herein.
5. No license is granted by implication or otherwise under any patents or other rights of any
third party or Hitachi, Ltd.
6. MEDICAL APPLICATIONS: Hitachi’s products are not authorized for use in MEDICAL
APPLICATIONS without the written consent of the appropriate officer of Hitachi’s sales
company. Such use includes, but is not limited to, use in life support systems. Buyers of
Hitachi’s products are requested to notify the relevant Hitachi sales offices when planning to
use the products in MEDICAL APPLICATIONS.
Contents
Revised Sections and Contents.....................................................................................I
Preface................... .....................................................................................................1
Section 1 Overview....................................................................................................3
1.1 Overview. 3
1.2 Internal Block Diagram ................................................................................................................ 8
1.3 Pin Arrangement and Functions.................................................................................................... 9
1.3.1 Pin Arrangement ............................................................................................................. 9
1.3.2 Pin Functions .................................................................................................................. 11
Section 2 CPU ..... .....................................................................................................17
2.1 Overview. .................................................................................................................................... 17
2.1.1 Features... ....................................................................................................................... 17
2.1.2 Address Space................................................................................................................. 18
2.1.3 Register Configuration .................................................................................................... 18
2.2 Register Descriptions.................................................................................................................... 19
2.2.1 General Registers ............................................................................................................ 19
2.2.2 Control Registers............................................................................................................. 20
2.2.3 Initial Register Values..................................................................................................... 21
2.3 Data Formats ................................................................................................................................ 21
2.3.1 Data Formats in General Registers .................................................................................. 22
2.3.2 Memory Data Formats..................................................................................................... 23
2.4 Addressing Modes ........................................................................................................................ 24
2.4.1 Addressing Modes........................................................................................................... 24
2.4.2 Effective Address Calculation ......................................................................................... 26
2.5 Instruction Set .............................................................................................................................. 30
2.5.1 Data Transfer Instructions ............................................................................................... 32
2.5.2 Arithmetic Operations ..................................................................................................... 34
2.5.3 Logic Operations............................................................................................................. 35
2.5.4 Shift Operations .............................................................................................................. 35
2.5.5 Bit Manipulations............................................................................................................ 37
2.5.6 Branching Instructions .................................................................................................... 41
2.5.7 System Control Instructions ............................................................................................ 43
2.5.8 Block Data Transfer Instruction ...................................................................................... 44
2.6 Basic Operational Timing............................................................................................................. 45
2.6.1 Access to On-Chip Memory (RAM, ROM) ..................................................................... 45
2.6.2 Access to On-Chip Peripheral Modules ........................................................................... 46
2.7 CPU States ................................................................................................................................... 48
2.7.1 Overview ....................................................................................................................... 48
2.7.2 Program Execution State ................................................................................................. 49
2.7.3 Program Halt State .......................................................................................................... 49
2.7.4 Exception-Handling State................................................................................................ 49
2.8 Memory Map................................................................................................................................ 50
2.8.1 Memory Map .................................................................................................................. 50
2.8.2 LCD RAM Address Relocation ....................................................................................... 51
i
2.9 Application Notes......................................................................................................................... 52
2.9.1 Notes on Data Access...................................................................................................... 52
2.9.2 Notes on Bit Manipulation ............................................................................................... 54
2.9.3 Notes on Use of the EEPMOV Instruction....................................................................... 59
Section 3 Exception Handling....................................................................................61
3.1 Overview. .................................................................................................................................... 61
3.2 Reset ....... .................................................................................................................................... 61
3.2.1 Overview ....................................................................................................................... 61
3.2.2 Reset Sequence ............................................................................................................... 61
3.2.3 Interrupt Immediately after Reset .................................................................................... 63
3.3 Interrupts. .................................................................................................................................... 64
3.3.1 Overview ....................................................................................................................... 64
3.3.2 Interrupt Control Registers .............................................................................................. 65
3.3.3 External Interrupts........................................................................................................... 72
3.3.4 Internal Interrupts............................................................................................................ 72
3.3.5 Interrupt Operations ........................................................................................................ 73
3.3.6 Interrupt Response Time ................................................................................................. 78
3.4 Application Notes......................................................................................................................... 78
3.4.1 Notes on Stack Area Use................................................................................................. 78
3.4.2 Notes on Rewriting Port Mode Registers......................................................................... 79
Section 4 Clock Pulse Generators ..............................................................................81
4.1 Overview. .................................................................................................................................... 81
4.1.2 System Clock and Subclock ............................................................................................ 81
4.2 System Clock Generator............................................................................................................... 82
4.3 Subclock Generator ...................................................................................................................... 84
4.4 Prescalers .................................................................................................................................... 86
4.5 Note on Oscillators....................................................................................................................... 86
Section 5 Power-Down Modes....................................................................................87
5.1 Overview. .................................................................................................................................... 87
5.1.1 System Control Registers ................................................................................................ 90
5.2 Sleep Mode .................................................................................................................................. 93
5.2.1 Transition to Sleep Mode ................................................................................................ 93
5.2.2 Clearing Sleep Mode....................................................................................................... 93
5.3 Standby Mode .............................................................................................................................. 93
5.3.1 Transition to Standby Mode ............................................................................................ 93
5.3.2 Clearing Standby Mode................................................................................................... 94
5.3.3 Oscillator Settling Time after Standby Mode is Cleared .................................................. 94
5.3.4 Transition to Standby Mode and Port Pin States .............................................................. 95
5.4 Watch Mode................................................................................................................................. 95
5.4.1 Transition to Watch Mode............................................................................................... 95
5.4.2 Clearing Watch Mode ..................................................................................................... 96
5.4.3 Oscillator Settling Time after Watch Mode is Cleared..................................................... 96
5.5 Subsleep Mode ............................................................................................................................. 96
5.5.1 Transition to Subsleep Mode ........................................................................................... 96
5.5.2 Clearing Subsleep Mode.................................................................................................. 97
ii
5.6 Subactive Mode............................................................................................................................ 97
5.6.1 Transition to Subactive Mode.......................................................................................... 97
5.6.2 Clearing Subactive Mode ................................................................................................ 97
5.6.3 Operating Frequency in Subactive Mode......................................................................... 97
5.7 Active (medium-speed) Mode ...................................................................................................... 98
5.7.1 Transition to Active (medium-speed) Mode .................................................................... 98
5.7.2 Clearing Active (medium-speed) Mode........................................................................... 98
5.7.3 Operating Frequency in Active (medium-speed) Mode.................................................... 98
5.8 Direct Transfer ............................................................................................................................. 98
5.8.1 Direct Transfer Overview................................................................................................ 98
5.8.2 Calculation of Direct Transfer Time before Transition .................................................... 99
Section 6 ROM .... .....................................................................................................103
6.1 Overview. .................................................................................................................................... 103
6.1.1 Block Diagram ................................................................................................................ 103
Section 7 RAM .... .....................................................................................................105
7.1 Overview. .................................................................................................................................... 105
7.1.1 Block Diagram ................................................................................................................ 105
Section 8 I/O Ports.....................................................................................................107
8.1 Overview. .................................................................................................................................... 107
8.2 Port 1 ...... .................................................................................................................................... 109
8.2.1 Overview ....................................................................................................................... 109
8.2.2 Register Configuration and Description........................................................................... 109
8.2.3 Pin Functions .................................................................................................................. 112
8.2.4 Pin States ....................................................................................................................... 113
8.2.5 MOS Input Pull-Up ......................................................................................................... 114
8.3 Port 2 ...... .................................................................................................................................... 114
8.3.1 Overview ....................................................................................................................... 114
8.3.2 Register Configuration and Description........................................................................... 114
8.3.3 Pin Functions .................................................................................................................. 117
8.3.4 Pin States ....................................................................................................................... 117
8.4 Port 3 ...... .................................................................................................................................... 118
8.4.1 Overview ....................................................................................................................... 118
8.4.2 Register Configuration and Description........................................................................... 118
8.4.3 Pin Functions .................................................................................................................. 121
8.4.5 MOS Input Pull-Up ......................................................................................................... 122
8.5 Port 4 ...... .................................................................................................................................... 122
8.5.1 Overview ....................................................................................................................... 122
8.5.2 Register Configuration and Description........................................................................... 122
8.5.3 Pin Functions .................................................................................................................. 124
8.6 Port 5 ...... .................................................................................................................................... 125
8.6.1 Overview ....................................................................................................................... 125
8.6.2 Register Configuration and Description........................................................................... 125
8.6.4 Pin States ....................................................................................................................... 128
8.6.5 MOS Input Pull-Up ......................................................................................................... 128
iii
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
