CXD3611R
Timing Generator for Progressive Scan CCD Image Sensor
Description
The CXD3611R is a timing generator IC which
generates the timing pulses for performing progressive
scan readout using the ICX414/415/424 CCD image
sensors.
Features
•
Base oscillation frequency
24.545451MHz (ICX414, 424)/
29.500000MHz (ICX415)
(When in double speed drive mode:
49.090902/59.000000MHz)
•
Electronic shutter function
•
Trigger shutter function
•
Supports central scanning mode (two types)/
double speed drive mode
•
Horizontal driver for CCD image sensor
(However, uses external driver for double speed
drive mode.)
•
Vertical driver for CCD image sensor
Applications
Monitoring/image analysis
Structure
Silicon gate CMOS IC
Applicable CCD Image Sensors
•
ICX414 (Type 1/2, 330K pixels)
•
ICX415 (Type 1/2, 460K pixels)
•
ICX424 (Type 1/3, 330K pixels)
Absolute Maximum Ratings
•
Supply voltage V
DD
Vss – 0.3 to +7.0
VL
–10.0 to Vss
VH
•
Input voltage
V
I
•
Output voltage V
O1
VL – 0.3 to +26.0
Vss – 0.3 to V
DD
+ 0.3
Vss – 0.3 to V
DD
+ 0.3
64 pin LQFP (Plastic)
V
V
V
V
V
V
V
°C
°C
V
O2
V
L
– 0.3 to V
SS
+ 0.3
V
O3
V
L
– 0.3 to V
H
+ 0.3
•
Operating temperature
Topr
–20 to +75
•
Storage temperature
Tstg
–55 to +150
Recommended Operating Conditions
•
Supply voltage V
DD
a, V
DD
b 3.0 to 5.5
V
DD
c
3.0 to 3.6
VM
0.0
VH
14.5 to 15.5
VL
–7.0 to –8.0
•
Operating temperature
Topr
–20 to +75
V
V
V
V
V
°C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E02561-PS
CXD3611R
Block Diagram
V
DD
2
XSHD
XSHP
15 16 17 18 14
OSCI
OSCO
32
20 21 22
19
27 V
SS
3
31
Selector
V
DD
3
26 ADCLK
23 PBLK
24 CLPDM
25 OBCLP
41 WEN
34 RDM
35 TRG
36 ESG
52 V1
54 V2
58 V3
62 SUB
50 VM
56 VH
60 VL
Vss2
CKI
30
Selector
Pulse Generator
1/2
1/2
MCKO 29
SNCSL
2
Selector
Latch
SSI 38
SCK 39
SEN 40
PS 37
HDRS 11
CDSRS 12
CCD
MD1
MD2
MD3
SMD1
SMD2
4
5
6
7
8
9
SSG
V Driver
Register
SMD3 10
SSGSL
3
49
RST
64
TEST
1 28 48
Vss1
Vss4
Vss5
13 33
V
DD
1
V
DD
4
43
SYNC
42
BLK
47
HDO
46
VDO
45
VDI
44
HDI
Notes)
1. CKI must always be input below amplitude V
DD
with a sine wave.
2. The system block diagram above is an example using an oscillator.
–2–
RG
H1
H2
XRS
CXD3611R
Pin Configuration
SYNC
WEN
48
RST
VM
NC
V1
NC
V2
NC
VH
NC
V3
NC
VL
NC
SUB
NC
TEST
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
1
V
SS
1
47
46
45
44
43
42
41
40
39
38
37
RDM
ESG
TRG
36
35
34
33
32 OSCI
31 OSCO
30 CKI
29 MCKO
28 Vss4
27 Vss3
26 ADCLK
25 OBCLP
24 CLPDM
23 PBLK
22 XRS
21 XSHD
20 XSHP
19 V
DD
3
18 V
DD
2
17 H2
2
SNCSL
3
SSGSL
4
CCD
5
MD1
6
MD2
7
MD3
8
SMD1
9
SMD2
10
SMD3
11
HDRS
12
CDSRS
13
V
DD
1
14
RG
15
V
SS
2
16
H1
∗
Groups of pins enclosed in the figure indicate sections for which power supply separation is possible.
–3–
V
DD
4
V
SS
5
HDO
VDO
SEN
SCK
BLK
HDI
VDI
SSI
PS
CXD3611R
Pin Description
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
Symbol
V
SS
1
SNCSL
SSGSL
CCD
MD1
MD2
MD3
SMD1
SMD2
SMD3
HDRS
I/O
—
I
I
I
I
I
I
I
I
I
I
GND
Control input used to switch sync system
High: CKI sync, Low: MCKO sync.
With pull-down resistor
Description
Pin used to switch external reset
High: External sync has priority, Low: Internal sync has priority
With pull-down resistor
Control input used to switch CCD
High: ICX415, Low: ICX414/424
Control input 1 used to switch drive mode
See the section on parallel control
Control input 2 used to switch drive mode
See the section on parallel control
Control input 3 used to switch drive mode
See the section on parallel control
Control input 1 used to switch exposure time
See the section on parallel control
Control input 2 used to switch exposure time
See the section on parallel control
Control input 3 used to switch exposure time
See the section on parallel control
Control input used to switch H system pulse polarity
H1 and H2 are targeted (Default is positive polarity.)
High: For external Dr, Low: For internal Dr
With pull-down resistor
With pull-down resistor
With pull-down resistor
With pull-down resistor
With pull-down resistor
With pull-down resistor
With pull-down resistor
With pull-down resistor
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
CDSRS
V
DD
1
RG
V
SS
2
H1
H2
V
DD
2
V
DD
3
XSHP
XSHD
XRS
PBLK
CLPDM
OBCLP
ADCLK
V
SS
3
I
—
O
—
O
O
—
—
O
O
O
O
O
O
O
—
Control input used to switch CDS system pulse polarity
XSHP XSHD, XRS, OBCLP CLPDM are targeted.
,
,
High: Positive polarity, Low: Negative polarity
With pull-down resistor
3.3V power supply. (Power supply for common logic block)
CCD reset gate pulse output
GND
CCD horizontal register clock output
CCD horizontal register clock output
3.3V power supply. (Power supply for H1/H2/RG)
3.3V power supply. (Power supply for CDS)
CCD precharge level sample-and-hold pulse output
CCD data level sample-and-hold pulse output
Sample-and-hold pulse output for analog/digital conversion phase alignment
Pulse output for horizontal and vertical blanking period pulse cleaning
CCD dummy signal clamp pulse output
CCD optical black signal clamp pulse output
Clock output for analog/digital conversion IC
Logical phase can be adjusted using serial interface data.
GND
–4–
CXD3611R
Pin
No.
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Symbol
V
SS
4
MCKO
CKI
OSCO
OSCI
V
DD
4
RDM
TRG
ESG
PS
SSI
SCK
SEN
WEN
BLK
SYNC
HDI
VDI
VDO
HDO
V
SS
5
RST
VM
NC
VI
NC
V2
NC
VH
NC
V3
NC
VL
I/O
—
O
I
O
I
—
I
I
I
I
I
I
I
O
O
O
I
I
O
O
—
I
—
—
O
—
O
—
—
—
O
—
—
GND
Description
System clock output for signal processing IC
Inverter input
Inverter output for oscillation; should be open or C grounded when not in use.
Inverter input for oscillation; should be fixed to Low when not in use.
3.3V power supply. (Power supply for common logic block)
Trigger control, normally fixed to V
DD
.
See the section on trigger shutter function.
Trigger control, normally fixed to V
DD
.
See the section on trigger shutter function.
Readout pulse position control, normally fixed to V
DD
.
See the section on trigger shutter function.
Control input used to switch serial and parallel
High: Parallel, Low: Serial
Serial interface data input for internal mode settings.
Serial interface clock input for internal mode settings.
Serial interface strobe input for internal mode settings.
Memory writing timing pulse output
Blank pulse output
SYNC pulse output
Horizontal sync reset signal input
Vertical sync reset signal input
Vertical sync signal output
Horizontal sync signal output
GND
Input pin for internal system reset
Normally, apply reset during power-on.
High: Normal operation, Low: Reset control
GND (Ground for vertical driver)
No connection
CCD vertical register clock output
No connection
CCD vertical register clock output
No connection
15.0V power supply. (Power supply for vertical driver)
No connection
CCD vertical register clock output
No connection
–7.5V power supply. (Power supply for vertical driver)
–5–
With pull-up resistor
With pull-up resistor
With pull-up resistor
With pull-up resistor
With pull-up resistor
With pull-up resistor
Schmitt trigger input
Schmitt trigger input
Schmitt trigger input
Schmitt trigger input
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