IRF9510
Data Sheet
January 2002
3.0A, 100V, 1.200 Ohm, P-Channel Power
MOSFET
This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17541.
Features
• 3.0A, 100V
• r
DS(ON)
= 1.200
Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
Symbol
D
Ordering Information
PART NUMBER
IRF9510
PACKAGE
TO-220AB
BRAND
IRF9510
G
S
NOTE: When ordering, include the entire part number.
Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
©2002 Fairchild Semiconductor Corporation
IRF9510 Rev. B
IRF9510
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
IRF9510
-100
-100
-3.0
-2.0
-12
±
20
20
0.16
190
-55 to 150
300
260
UNITS
V
V
A
A
A
V
W
W/
o
C
mJ
o
C
o
C
o
C
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
Drain to Gate Voltage (R
GS
= 20k
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Operating and Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
PARAMETER
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
I
GSS
I
DSS
I
D(ON)
r
DS(ON)
g
fs
t
d(ON)
t
r
t
d(OFF)
t
f
TEST CONDITIONS
V
GS
= 0V, I
D
= -250
µ
A, (Figure 10)
V
GS
= V
DS
, I
D
= -250
µ
A
V
GS
=
±
20V
V
DS
= Rated BV
DSS
, V
GS
= 0V
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V, T
C
= 125
o
C
V
DS
> I
D(ON) x
r
DS(ON)MAX
, V
GS
= -10V,
(Figure 7)
V
GS
= -10V, I
D
= -1.5A, (Figures 8, 9)
V
DS
> I
D(ON)
x r
DS(ON)
Max, I
D
= -1.5A,
(Figure 12)
V
DD
= 0.5 x Rated BV
DSS
, I
D
≈
-3.0A,
R
G
= 50
Ω
, V
GS
= 10V, (Figures 17, 18)
R
L
= 15.7
Ω
for V
DSS =
50V
R
L
= 12.3
Ω
for V
DSS
= 40V
MOSFET Switching Times are
Essentially Independent of Operating
Temperature
V
GS
= -10V, I
D
= -3A, V
DS
= 0.8 x Rated BV
DSS,
(Figures 14, 19, 20) Gate Charge is
Essentially Independent of Operating
Temperature
V
GS
= 0V, V
DS
= -25V, f = 1.0MHz,
(Figure 11)
MIN
-100
-2.0
-
-
-
-3.0
-
0.8
-
-
-
-
TYP
-
-
-
-
-
-
1.000
1.1
15
30
20
20
MAX
-
-4.0
±1
00
-25
-250
-
1.200
-
30
60
40
40
UNITS
V
V
nA
µ
A
µ
A
A
Ω
S
ns
ns
ns
ns
Drain to Source Breakdown Voltage
Gate to Threshold Voltage
Gate to Source Leakage Current
Zero-Gate Voltage Drain Current
On-State Drain Current (Note 2)
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge
Gate to Drain “Miller” Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Internal Drain Inductance
Q
g(TOT)
Q
gs
Q
gd
C
ISS
C
OSS
C
RSS
L
D
-
-
-
-
-
-
-
8.5
3.8
4.7
180
85
30
3.5
11
-
-
-
-
-
-
nC
nC
nC
pF
pF
pF
nH
Measured From the
Contact Screw on Tab
to Center of Die
Measured From the
Drain Lead, 6mm
(0.25in) From Package
to Center of Die
Modified MOSFET
Symbol Showing the In-
ternal Devices
Inductances
D
L
D
G
L
S
S
-
4.5
-
nH
Internal Source Inductance
L
S
Measured From The
Source Lead, 6mm
(0.25in) From Header to
Source Bonding Pad
Typical Socket Mount
-
7.5
-
nH
Junction to Case
Junction to Ambient
R
θ
JC
R
θ
JA
-
-
-
-
6.4
62.5
o
C/W
o
C/W
©2002 Fairchild Semiconductor Corporation
IRF9510 Rev. B
IRF9510
Source to Drain Diode Specifications
PARAMETER
Continuous Source to Drain Current
Pulse Source to Drain Current
(Note 3)
SYMBOL
I
SD
I
SDM
TEST CONDITIONS
Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Diode
G
D
MIN
-
-
TYP
-
-
MAX
-3.0
-12
UNITS
A
A
S
Source to Drain Diode Voltage(Note 2)
Reverse Recovery Time
Reverse Recovered Charge
NOTES:
V
SD
t
rr
Q
RR
T
C
= 25
o
C, I
SD
= -3.0A, V
GS
= 0V, (Figure 13)
T
J
= 150
o
C, I
SD
= -3.0A, dI
SD
/dt = 100A/
µ
s
T
J
= 150
o
C, I
SD
= -3.0A, dI
SD
/dt = 100A/
µ
s
-
-
-
-
120
6.0
-1.5
-
-
V
ns
µC
2. Pulse test: pulse width
≤
300µs, duty cycle
≤
2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. V
DD
= 25V, starting T
J
= 25
o
C, L = 31.7mH, R
G
= 25Ω, peak I
AS
= 3.0A. See Figures 15, 16.
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
0.8
Unless Otherwise Specified
-5
I
D,
DRAIN CURRENT (A)
-4
-3
0.6
0.4
-2
0.2
0
0
25
50
75
100
T
C,
CASE TEMPERATURE (
o
C)
125
150
-1
0
25
50
75
100
125
T
C,
CASE TEMPERATURE (
o
C)
150
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
Z
θJC
, NORMALIZED TRANSIENT
THERMAL IMPEDANCE
1
0.5
P
DM
0.2
0.1 0.1
0.05
0.02
0.01
SINGLE PULSE
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
T
J
= P
DM
x Z
θJC
x R
θJC
+ T
C
10
-3
10
-2
0.1
1
10
0.01
10
-5
10
-4
t
1
, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE
©2002 Fairchild Semiconductor Corporation
IRF9510 Rev. B
IRF9510
Typical Performance Curves
Unless Otherwise Specified
(Continued)
-5
10µs
10
I
D
, DRAIN CURRENT (A)
100µs
I
D
, DRAIN CURRENT (A)
-4
V
GS
= -9V
V
GS
= -10V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
-3
V
GS
= -8V
1ms
1
OPERATION IN THIS
REGION IS LIMITED
BY r
DS(ON)
T
C
= 25
o
C
T
J
= MAX RATED
10ms
100ms
DC
-2
V
GS
= -7V
V
GS
= -6V
V
GS
= -5V
-1
0.1
1
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
10
2
0
0
-10
-20
-30
-40
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-50
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
-5
I
D(ON)
, ON-STATE DRAIN CURRENT (A)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
GS
= -10V
V
GS
= -9V
-12.0
V
DS
> I
D(ON)
x R
DS(ON)MAX.
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
I
D
, DRAIN CURRENT (A)
-4
-9.6
-3
V
GS
= -8V
-7.2
T
J
= 125
o
C
-4.8
T
J
= 25
o
C
T
J
= -55
o
C
-2
V
GS
= -7V
V
GS
= -6V
V
GS
= -5V
-1
-2.4
0
0
-2
-4
-6
-8
-10
0
0
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-2
-4
-6
-8
V
GS
, GATE TO SOURCE VOLTAGE (V)
-10
FIGURE 6. SATURATION CHARACTERISTICS
r
DS(ON)
, DRAIN TO SOURCE ON RESISTANCE
FIGURE 7. TRANSFER CHARACTERISTICS
5
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE VOLTAGE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
4
2.5
2.0
V
GS
= -10V, I
D
= -1.5A
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
3
V
GS
= -10V
2
V
GS
= -20V
1
1.5
1.0
0.5
0
0
-4
-8
-12
I
D,
DRAIN CURRENT (A)
-16
-20
0
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
©2002 Fairchild Semiconductor Corporation
IRF9510 Rev. B
IRF9510
Typical Performance Curves
1.25
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
Unless Otherwise Specified
(Continued)
500
1.15
C, CAPACITANCE (pF)
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
400 C
OSS
≈
C
DS
+ C
GD
1.05
300
C
ISS
0.95
200
0.85
100
C
OSS
C
RSS
0.75
-40
0
40
80
120
160
0
0
-10
-20
-30
-40
-50
T
J
, JUNCTION TEMPERATURE (
o
C)
V
DS,
DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
2.5
g
fs
, TRANSCONDUCTANCE (S)
T
J
= -55
o
C
2.0
T
J
= 25
o
C
T
J
= 125
o
C
1.5
I
SD
, SOURCE TO DRAIN CURRENT (A)
-10
2
-10
T
J
= 150
o
C
T
J
= 25
o
C
-1
1.0
0.5
V
DS
>
I
D(ON)
x R
DS(ON) MAX.
80µs PULSE TEST
0
-1.2
-2.4
-3.6
I
D,
DRAIN CURRENT (A)
-4.8
-6.0
0
-0.1
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6
V
SD
, SOURCE TO DRAIN VOLTAGE (V)
-1.8
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
0
V
GS,
GATE TO SOURCE VOLTAGE (V)
I
D
= -4A
-5
-10
V
DS
= -20V
V
DS
= -50V
V
DS
= -80V
-15
0
2
4
6
8
Q
g(TOT),
TOTAL GATE CHARGE (nC)
10
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
©2002 Fairchild Semiconductor Corporation
IRF9510 Rev. B
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