HN58X24512I
Two-wire serial interface
512k EEPROM (64-kword
×
8-bit)
ADE-203-1239 (Z)
Preliminary
Rev. 0.0
Jan. 10, 2001
Description
HN58X24512I is the two-wire serial interface EEPROM (Electrically Erasable and Programmable ROM).
It realizes high speed, low power consumption and a high level of reliability by employing advanced
MNOS memory technology and CMOS process and low voltage circuitry technology. It also has a 128-
byte page programming function to make it’s write operation faster.
Note: Hitachi’s serial EEPROM are authorized for using consumer applications such as cellular phone,
camcorders, audio equipment. Therefore, please contact Hitachi’s sales office before using
industrial applications such as automotive systems, embedded controllers, and meters.
Features
•
•
•
•
Single supply: 1.8 V to 5.5 V
Two-wire serial interface (I
2
C
TM
serial bus*
1
)
Clock frequency: 1 MHz (2.5 V to 5.5 V)/400 kHz (1.8 V to 2.5 V)
Power dissipation:
Standby: 3 µA (max)
Active (Read): 2 mA (max)
Active (Write): 5 mA (max)
Automatic page write: 128-byte/page
Write cycle time: 10 ms (2.5 V to 5.5 V)/15 ms (1.8 V to 2.5 V)
Endurance: 10
5
Cycles (Page write mode)
Data retention: 10 Years
•
•
•
•
Preliminary: The specification of this device are subject to change without notice. Please contact your
nearest Hitachi’s Sales Dept. regarding specification.
HN58X24512I
•
Small size packages: SOP-8pin (200 mil-wide)
•
Shipping tape and reel: 2,500 IC/reel
•
Temperature range: –40 to +85°C
Note: 1. I
2
C is a trademark of Philips Corporation.
Ordering Information
Type No.
HN58X24512FPI
Internal organization Operating voltage
512k bit
(65536× 8-bit)
2.5 V to 5.5 V
1.8 V to 2.5 V
Frequency
1 MHz
400 kHz
Package
200 mil 8-pin plastic SOP
Pin Arrangement
8-pin SOP
A0
A1
NC
V
SS
1
2
3
4
8
7
6
5
(Top view)
V
CC
WP
SCL
SDA
Pin Description
Pin name
A0, A1
SCL
SDA
WP
V
CC
V
SS
NC
Function
Device address
Serial clock input
Serial data input/output
Write protect
Power supply
Ground
No connection
2
HN58X24512I
Block Diagram
V
CC
V
SS
Address generator
WP
A0, A1
SCL
SDA
Control
logic
High voltage generator
X decoder
Memory array
Y decoder
Y-select & Sense amp.
Serial-parallel converter
Absolute Maximum Ratings
Parameter
Supply voltage relative to V
SS
Input voltage relative to V
SS
Operating temperature range*
1
Storage temperature range
Symbol
V
CC
Vin
Topr
Tstg
Value
–0.6 to +7.0
–0.5*
2
to +7.0*
3
–40 to +85
–65 to +125
Unit
V
V
˚C
˚C
Notes: 1. Including electrical characteristics and data retention.
2. Vin (min): –3.0 V for pulse width 50 ns.
3. Should not exceed V
CC
+ 1.0 V.
DC Operating Conditions
Parameter
Supply voltage
Symbol
V
CC
V
SS
Input high voltage
Input low voltage
Operating temperature
V
IH
V
IL
Topr
Min
1.8
0
V
CC
×
0.7
–0.3*
1
–40
Typ
—
0
—
—
—
Max
5.5
0
V
CC
+ 0.5*
2
V
CC
×
0.3
85
Unit
V
V
V
V
˚C
Notes: 1. V
IL
(min): –1.0 V for pulse width 50 ns.
2. V
IH
(max): V
CC
+ 1.0 V for pulse width 50 ns.
3
HN58X24512I
DC Characteristics
(Ta = –40 to +85˚C, V
CC
= 1.8 V to 5.5 V)
Parameter
Input leakage current
Symbol
I
LI
Min
—
—
Output leakage current
Standby V
CC
current
Read V
CC
current
Write V
CC
current
Output low voltage
I
LO
I
SB
I
CC1
I
CC2
V
OL2
—
—
—
—
—
Typ
—
—
—
1.0
—
—
—
Max
2.0
20
2.0
3.0
2.0
5.0
0.4
Unit
µA
µA
µA
µA
mA
mA
V
Test conditions
V
CC
= 5.5 V, Vin = 0 to 5.5 V
(SCL, SDA)
V
CC
= 5.5 V, Vin = 0 to 5.5 V
(A0, A1, WP)
V
CC
= 5.5 V, Vout = 0 to 5.5 V
Vin = V
SS
or V
CC
V
CC
= 5.5 V, Read at 400 kHz
V
CC
= 5.5 V, Write at 400 kHz
V
CC
= 4.5 to 5.5 V, I
OL
= 1.6 mA
V
CC
= 2.5 to 4.5 V, I
OL
= 0.8 mA
V
CC
= 1.8 to 2.5 V, I
OL
= 0.4 mA
V
CC
= 1.8 to 2.5 V, I
OL
= 0.2 mA
V
OL1
—
—
0.2
V
Capacitance
(Ta = 25˚C, f = 1 MHz)
Parameter
Symbol
Min
—
—
Typ
—
—
Max
6.0
6.0
Unit
pF
pF
Test
conditions
Vin = 0 V
Vout = 0 V
Input capacitance (A0 to A1, SCL, WP) Cin*
1
Output capacitance (SDA)
Note:
C
I/O
*
1
1. This parameter is sampled and not 100% tested.
4
HN58X24512I
AC Characteristics
(Ta = –40 to +85˚C, V
CC
= 1.8 to 5.5 V)
Test Conditions
•
Input pules levels:
V
IL
= 0.2
×
V
CC
V
IH
= 0.8
×
V
CC
•
Input rise and fall time: 20 ns
•
Input and output timing reference levels: 0.5
×
V
CC
•
Output load: TTL Gate + 100 pF
V
CC
= 1.8 to 5.5 V
Parameter
Clock frequency
Clock pulse width low
Clock pulse width high
Noise suppression time
Access time
Bus free time for next mode
Start hold time
Start setup time
Data in hold time
Data in setup time
Input rise time
Input fall time
Stop setup time
Data out hold time
Write cycle time
Symbol
f
SCL
t
LOW
t
HIGH
t
I
t
AA
t
BUF
t
HD.STA
t
SU.STA
t
HD.DAT
t
SU.DAT
t
R
t
F
t
SU.STO
t
DH
t
WC
Min
—
1200
600
—
100
1200
600
600
0
100
—
—
600
50
—
Max
400
—
—
50
900
—
—
—
—
—
300
300
—
—
15
V
CC
= 2.5 to 5.5 V
Min
—
600
400
—
100
500
250
250
0
100
—
—
250
50
—
Max
1000
—
—
50
550
—
—
—
—
—
300
100
—
—
10
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
2
1
1
1
Notes
Notes: 1. This parameter is sampled and not 100% tested.
2. t
WC
is the time from a stop condition to the end of internally controlled write cycle.
5
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