HN58S65A Series
64 k EEPROM (8-kword
×
8-bit)
Ready/Busy function
ADE-203-691A (Z)
Preliminary
Rev. 0.3
Nov. 1997
Description
The Hitachi HN58S65A series is electrically erasable and programmable ROM organized as 8192-word
×
8-bit. It has realized high speed, low power consumption and high reliability by employing advanced
MNOS memory technology and CMOS process and circuitry technology. They also have a 64-byte
page programming function to make their write operations faster.
Features
•
Single supply: 2.2 to 3.6 V
•
Access time: 150 ns (max)
•
Power dissipation
Active: 10 mW/MHz (typ)
Standby: 36
µW
(max)
•
On-chip latches: address, data,
CE, OE, WE
•
Automatic byte write: 15 ms (max)
•
Automatic page write (64 bytes): 15 ms (max)
•
Ready/Busy
•
Data
polling and Toggle bit
•
Data protection circuit on power on/off
•
Conforms to JEDEC byte-wide standard
•
Reliable CMOS with MNOS cell technology
•
10
5
erase/write cycles (in page mode)
•
10 years data retention
•
Software data protection
•
Industrial versions (Temperature range: – 40 to + 85˚C) are also available.
Preliminary: This document contains information on a new product. Specifications and information
contained herein are subject to change without notice.
HN58S65A Series
Ordering Information
Type No.
HN58S65AT-15
Access time
150 ns
Package
28-pin plastic TSOP(TFP-28DB)
Pin Arrangement
HN58S65AT Series
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
I/O3
I/O4
I/O5
I/O6
I/O7
CE
A10
15
16
17
18
19
20
21
22
23
24
25
26
27
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
A3
A4
A5
A6
A7
A12
RDY/Busy
V
CC
WE
NC
A8
A9
A11
OE
(Top view)
Pin Description
Pin name
A0 to A12
I/O0 to I/O7
OE
CE
WE
V
CC
V
SS
RDY/Busy
NC
Function
Address input
Data input/output
Output enable
Chip enable
Write enable
Power supply
Ground
Ready busy
No connection
HN58S65A Series
Block Diagram
I/O0
High voltage generator
to
V
CC
V
SS
I/O7
RDY/Busy
OE
CE
WE
Control logic and timing
I/O buffer
and
input latch
A0
to
Y decoder
Y gating
A5
Address
buffer and
latch
A6
to
X decoder
Memory array
A12
Data latch
Operation Table
Operation
Read
Standby
Write
Deselect
Write Inhibit
CE
V
IL
V
IH
V
IL
V
IL
×
×
Data
Polling
Notes: 1.
×
: Don’t care
V
IL
OE
V
IL
×*
1
V
IH
V
IH
×
V
IL
V
IL
WE
V
IH
×
V
IL
V
IH
V
IH
×
V
IH
RDY/Busy
High-Z
High-Z
High-Z to V
OL
High-Z
—
—
V
OL
I/O
Dout
High-Z
Din
High-Z
—
—
Dout (I/O7)
HN58S65A Series
Absolute Maximum Ratings
Parameter
Power supply voltage relative to V
SS
Input voltage relative to V
SS
Operating temperature range *
2
Storage temperature range
Symbol
V
CC
Vin
Topr
Tstg
Value
–0.6 to +7.0
–0.5*
1
to +7.0*
3
0 to +70
–55 to +125
Unit
V
V
˚C
˚C
Notes: 1. Vin min : –3.0 V for pulse width
≤
50 ns.
2. Including electrical characteristics and data retention.
3. Should not exceed V
CC
+ 1.0 V.
Recommended DC Operating Conditions
Parameter
Supply voltage
Symbol
V
CC
V
SS
Input voltage
V
IL
V
IH
Operating temperature
Topr
Notes: 1. V
IL
min: –1.0 V for pulse width
≤
50 ns.
2. V
IH
max: V
CC
+ 1.0 V for pulse width
≤
50 ns.
Min
2.2
0
–0.3*
1
V
CC
×
0.7
0
Typ
3.0
0
—
—
—
Max
3.6
0
0.4
V
CC
+ 0.3*
2
70
Unit
V
V
V
V
˚C
DC Characteristics
(Ta = 0 to + 70˚C, V
CC
= 2.2 to 3.6 V)
Parameter
Input leakage current
Output leakage current
Standby V
CC
current
Symbol
I
LI
I
LO
I
CC1
I
CC2
Operating V
CC
current
I
CC3
Min
—
—
—
—
—
—
Output low voltage
Output high voltage
V
OL
V
OH
—
Typ
—
—
1 to 2
—
—
—
—
Max
2
2
3.5
500
6
12
0.4
—
Unit
µA
µA
µA
µA
mA
mA
V
V
Test conditions
V
CC
= 5.5 V, Vin = 5.5 V
V
CC
= 5.5 V, Vout = 5.5/0.4 V
CE
= V
CC
CE
= V
IH
Iout = 0 mA, Duty = 100%,
Cycle = 1
µs
at V
CC
= 3.6 V
Iout = 0 mA, Duty = 100%,
Cycle = 150 ns at V
CC
= 3.6 V
I
OL
= 1.0 mA
I
OH
= –100
µA
V
CC
×
0.8 —
HN58S65A Series
Capacitance
(Ta = 25˚C, f = 1 MHz)
Parameter
Input capacitance
Output capacitance
Note:
Symbol
Cin*
1
Cout*
1
Min
—
—
Typ
—
—
Max
6
12
Unit
pF
pF
Test conditions
Vin = 0 V
Vout = 0 V
1. This parameter is sampled and not 100% tested.
AC Characteristics
(Ta = 0 to + 70˚C, V
CC
= 2.2 to 3.6 V)
Test Conditions
•
•
•
•
•
Input pulse levels : 0.4 V to 2.4 V (V
CC
= 2.7 to 3.6 V), 0.4 V to 1.9 V (V
CC
= 2.2 to 2.7 V)
Input rise and fall time :
≤
5 ns
Input timing reference levels : 0.8, 1.8 V
Output load : 1TTL Gate +100 pF
Output reference levels : 1.5 V, 1.5 V (V
CC
= 2.7 to 3.6 V)
1.1 V, 1.1 V (V
CC
= 2.2 to 2.7 V)
Read Cycle
HN58S65A
-15
Parameter
Address to output delay
CE
to output delay
OE
to output delay
Address to output hold
OE
(CE) high to output float*
1
Symbol
t
ACC
t
CE
t
OE
t
OH
t
DF
Min
—
—
10
0
0
Max
150
150
80
—
80
Unit
ns
ns
ns
ns
ns
Test conditions
CE
=
OE
= V
IL
,
WE
= V
IH
OE
= V
IL
,
WE
= V
IH
CE
= V
IL
,
WE
= V
IH
CE
=
OE
= V
IL
,
WE
= V
IH
CE
= V
IL
,
WE
= V
IH
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