CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
TABLE 1. HMU16/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
TEST
CONDITIONS
V
CC
= 5.5V
V
CC
= 4.5V
I
OH
= -400µA
V
CC
= 4.5V (Note 2)
I
OL
= +4.0mA
V
CC
= 4.5V (Note 2)
V
IN
= V
CC
or GND
V
CC
= 5.5V
V
OUT
= V
CC
or GND
V
CC
= 5.5V
V
IN
= V
CC
or GND,
V
CC
= 5.5V,
Outputs Open
f = 1.0MHz,
V
IN
= V
CC
or GND
V
CC
= 5.5V (Note 3)
(Note 4)
GROUP A
SUBGROUPS
1, 2, 3
1, 2, 3
1, 2, 3
TEMPERATURE (
o
C)
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
PARAMETER
Logical One Input Voltage
Logical Zero Input Voltage
Output HIGH Voltage
SYMBOL
V
IH
V
IL
V
OH
V
OL
I
I
I
O
I
CCSB
MIN
2.2
-
2.6
MAX
-
0.8
-
UNITS
V
V
V
Output LOW Voltage
1, 2, 3
-
0.4
V
Input Leakage Current
1, 2, 3
-10
+10
mA
Output or I/O Leakage
Current
Standby Power Supply
Current
1, 2, 3
-10
+10
mA
1, 2, 3
-
500
mA
Operating Power Supply
Current
I
CCOP
1, 2, 3
-55
≤
T
A
≤
125
-
7.0
mA
Functional Test
NOTES:
FT
7, 8
-55
≤
T
A
≤
125
-
-
2. Interchanging of force and sense conditions is permitted.
3. Operating supply current is proportional to frequency, typical rating is 5mA/MHz.
4. Tested as follows: f = 1MHz, V
IH
(clock inputs) = 3.0, V
IH
(all other inputs) = 2.6, V
IL
= 0.4, V
OH
≥
1.5V, and V
OL
≤
1.5V.
3-30
HMU16/883
TABLE 2. HMU16/883 AC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
(NOTE 5)
TEST
CONDITIONS
-45
GROUP A
SUBGROUPS
9, 10, 11
TEMPERATURE
(
o
C)
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
MIN
-
MAX
70
MIN
-
-60
MAX
90
UNITS
ns
PARAMETER
Unclocked Multiply
Time
Clocked Multiply Time
X, Y, RND Setup Time
Clock HIGH Pulse
Width
Clock LOW Pulse Width
MSPSEL to Product
Out
Output Clock to P
Output Clock to Y
Three-State Enable
Time
Clock Low Hold Time
CLKXY Relative to
CLKML
NOTES:
SYMBOL
t
MUC
t
MC
t
S
t
PWH
t
PWL
t
PDSEL
t
PDP
t
PDY
t
ENA
t
HCL
9, 10, 11
9, 10, 11
9, 10, 11
-
18
15
45
-
-
-
20
20
60
-
-
ns
ns
ns
9, 10, 11
9, 10, 11
15
-
-
25
20
-
-
30
ns
ns
9, 10, 11
9, 10, 11
(Note 6)
9, 10, 11
-
-
-
25
25
25
-
-
-
30
30
30
ns
ns
ns
(Note 7)
9, 10, 11
0
-
0
-
ns
5. AC Testing as follows: V
CC
= 4.5V and 5.5V. Input levels 0V and 3.0V; timing reference levels = 1.5V; output load per test load circuit,
with V
1
= 4V, R
1
= 500Ω and C
L
= 40pF.
6. Transition is measured at
±200mV
from steady state voltage; output loading per test load circuit with V
1
= 1.5V, R
1
= 500Ω and C
L
= 40pF.
7. To ensure the correct product is entered in the Output Registers; new data may not be entered into the Input Registers before the Output
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
