Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
The M16C/62M group of single-chip microcomputers are built using the high-performance silicon gate
CMOS process using a M16C/60 Series CPU core and are packaged in a 100-pin plastic molded QFP.
These single-chip microcomputers operate using sophisticated instructions featuring a high level of instruc-
tion efficiency. With 1M bytes of address space, low voltage (2.2V to 3.6V), they are capable of executing
instructions at high speed. They also feature a built-in multiplier and DMAC, making them ideal for control-
ling office, communications, industrial equipment, and other high-speed processing applications.
The M16C/62M group includes a wide range of products with different internal memory types and sizes and
various package types.
Features
• Memory capacity .................................. ROM (See Figure 1.1.4. ROM Expansion)
RAM 10K to 20K bytes
• Shortest instruction execution time ...... 100ns (f(X
IN
)=10MH
Z
, V
CC
=2.7V to 3.6V)
142.9ns (f(X
IN
)=7MH
Z
, V
CC
=2.2V to 3.6V with software one-wait)
• Supply voltage ..................................... 2.7V to 3.6V (f(X
IN
)=10MH
Z
, without software wait)
2.4V to 2.7V (f(X
IN
)=7MH
Z
, without software wait)
2.2V to 2.4V (f(X
IN
)=7MH
Z
with software one-wait)
• Low power consumption ...................... 28.5mW (V
CC
= 3V, f(X
IN
)=10MH
Z
, without software wait)
• Interrupts .............................................. 25 internal and 8 external interrupt sources, 4 software
interrupt sources; 7 levels (including key input interrupt)
• Multifunction 16-bit timer ...................... 5 output timers + 6 input timers
• Serial I/O .............................................. 5 channels
(3 for UART or clock synchronous, 2 for clock synchronous)
• DMAC .................................................. 2 channels (trigger: 24 sources)
• A-D converter ....................................... 10 bits X 8 channels (Expandable up to 10 channels)
• D-A converter ....................................... 8 bits X 2 channels
• CRC calculation circuit ......................... 1 circuit
• Watchdog timer .................................... 1 line
• Programmable I/O ............................... 87 lines
_______
• Input port .............................................. 1 line (P8
5
shared with NMI pin)
• Memory expansion .............................. Available (to a maximum of 1M bytes)
• Chip select output ................................ 4 lines
• Clock generating circuit ....................... 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Applications
Audio, cameras, office equipment, communications equipment, portable equipment
1
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Pin Configuration
Figures 1.1.1 and 1.1.2 show the pin configurations (top view).
PIN CONFIGURATION (top view)
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
P1
0
/D
8
P1
1
/D
9
P1
2
/D
10
P1
3
/D
11
P1
4
/D
12
P1
5
/D
13
/INT3
P1
6
/D
14
/INT4
P1
7
/D
15
/INT5
P2
0
/A
0
(/D
0
/-)
P2
1
/A
1
(/D
1
/D
0
)
P2
2
/A
2
(/D
2
/D
1
)
P2
3
/A
3
(/D
3
/D
2
)
P2
4
/A
4
(/D
4
/D
3
)
P2
5
/A
5
(/D
5
/D
4
)
P2
6
/A
6
(/D
6
/D
5
)
P2
7
/A
7
(/D
7
/D
6
)
Vss
P3
0
/A
8
(/-/D
7
)
Vcc
P3
1
/A
9
P3
2
/A
10
P3
3
/A
11
P3
4
/A
12
P3
5
/A
13
P3
6
/A
14
P3
7
/A
15
P4
0
/A
16
P4
1
/A
17
P4
2
/A
18
P4
3
/A
19
P0
7
/D
7
P0
6
/D
6
P0
5
/D
5
P0
4
/D
4
P0
3
/D
3
P0
2
/D
2
P0
1
/D
1
P0
0
/D
0
P10
7
/AN
7
/KI
3
P10
6
/AN
6
/KI
2
P10
5
/AN
5
/KI
1
P10
4
/AN
4/
KI
0
P10
3
/AN
3
P10
2
/AN
2
P10
1
/AN
1
AV
SS
P10
0
/AN
0
V
REF
AVcc
P9
7
/AD
TRG
/S
IN
4
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1
2 3
4 5
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
M16C/62 Group
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
P4
4
/CS0
P4
5
/CS1
P4
6
/CS2
P4
7
/CS3
P5
0
/WRL/WR
P5
1
/WRH/BHE
P5
2
/RD
P5
3
/BCLK
P5
4
/HLDA
P5
5
/HOLD
P5
6
/ALE
P5
7
/RDY/CLK
OUT
P6
0
/CTS
0
/RTS
0
P6
1
/CLK
0
P6
2
/RxD
0
P6
3
/T
X
D
0
P6
4
/CTS
1
/RTS
1
/CLKS
1
P6
5
/CLK
1
P6
6
/RxD
1
P6
7
/T
X
D
1
P9
6
/ANEX1/S
OUT
4
P9
5
/ANEX0/CLK4
P9
4
/DA
1
/TB4
IN
P9
3
/DA
0
/TB3
IN
P9
2
/TB2
IN
/S
OUT
3
P9
1
/TB1
IN
/S
IN
3
P9
0
/TB0
IN
/CLK3
BYTE
CNVss
P8
7
/X
CIN
P8
6
/X
COUT
RESET
X
OUT
V
SS
X
IN
V
CC
P8
5
/NMI
P8
4
/INT
2
P8
3
/INT
1
P8
2
/INT
0
P8
1
/TA4
IN
/U
P8
0
/TA4
OUT
/U
P7
7
/TA3
IN
P7
6
/TA3
OUT
P7
5
/TA2
IN
/W
P7
4
/TA2
OUT
/W
P7
3
/CTS
2
/RTS
2
/TA1
IN
/V
P7
2
/CLK
2
/TA1
OUT
/V
P7
1
/RxD
2
/SCL/TA0
IN
/TB5
IN
P7
0
/T
X
D
2
/SDA/TA0
OUT
Package: 100P6S-A
Figure 1.1.1. Pin configuration (top view)
2
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PIN CONFIGURATION (top view)
P1
3
/D
11
P1
4
/D
12
P1
5
/D
13
/INT
3
P1
6
/D
14
/INT
4
P1
7
/D
15
/INT
5
P2
0
/A
0
(/D
0
/-)
P2
1
/A
1
(/D
1
/D
0
)
P2
2
/A
2
(/D
2
/D
1
)
P2
3
/A
3
(/D
3
/D
2
)
P2
4
/A
4
(/D
4
/D
3
)
P2
5
/A
5
(/D
5
/D
4
)
P2
6
/A
6
(/D
6
/D
5
)
P2
7
/A
7
(/D
7
/D
6
)
Vss
P3
0
/A
8
(/-/D
7
)
Vcc
P3
1
/A
9
P3
2
/A
10
P3
3
/A
11
P3
4
/A
12
P3
5
/A
13
P3
6
/A
14
P3
7
/A
15
P4
0
/A
16
P4
1
/A
17
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
P1
2
/D
10
P1
1
/D
9
P1
0
/D
8
P0
7
/D
7
P0
6
/D
6
P0
5
/D
5
P0
4
/D
4
P0
3
/D
3
P0
2
/D
2
P0
1
/D
1
P0
0
/D
0
P10
7
/AN
7
/KI
3
P10
6
/AN
6
/KI
2
P10
5
/AN
5
/KI
1
P10
4
/AN
4/
KI
0
P10
3
/AN
3
P10
2
/AN
2
P10
1
/AN
1
AV
SS
P10
0
/AN
0
V
REF
AVcc
P9
7
/AD
TRG
/S
IN
4
P9
6
/ANEX1/S
OUT
4
P9
5
/ANEX0/CLK4
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1 2
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
3 4 5 6 7
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
M16C/62 Group
P4
2
/A
18
P4
3
/A
19
P4
4
/CS0
P4
5
/CS1
P4
6
/CS2
P4
7
/CS3
P5
0
/WRL/WR
P5
1
/WRH/BHE
P5
2
/RD
P5
3
/BCLK
P5
4
/HLDA
P5
5
/HOLD
P5
6
/ALE
P5
7
/RDY/CLK
OUT
P6
0
/CTS
0
/RTS
0
P6
1
/CLK
0
P6
2
/RxD
0
P6
3
/T
X
D
0
P6
4
/CTS
1
/RTS
1
/CLKS
1
P6
5
/CLK
1
P6
6
/RxD
1
P6
7
/T
X
D
1
P7
0
/T
X
D
2
/SDA/TA0
OUT
P7
1
/RxD
2
/SCL/TA0
IN
/TB5
IN
P7
2
/CLK
2
/TA1
OUT
/V
P9
4
/DA
1
/TB4
IN
P9
3
/DA
0
/TB3
IN
P9
2
/TB2
IN
/S
OUT
3
P9
1
/TB1
IN
/S
IN
3
P9
0
/TB0
IN
/CLK3
BYTE
CNVss
P8
7
/X
CIN
P8
6
/X
COUT
RESET
X
OUT
V
SS
X
IN
V
CC
P8
5
/NMI
P8
4
/INT
2
P8
3
/INT
1
P8
2
/INT
0
P8
1
/TA4
IN
/U
P8
0
/TA4
OUT
/U
P7
7
/TA3
IN
P7
6
/TA3
OUT
P7
5
/TA2
IN
/W
P7
4
/TA2
OUT
/W
P7
3
/CTS
2
/RTS
2
/TA1
IN
/V
Package: 100P6Q-A
Figure 1.1.2. Pin configuration (top view)
3
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Block Diagram
Figure 1.1.3 is a block diagram of the M16C/62M group.
Block diagram of the M16C/62M group
8
8
8
8
8
8
8
I/O ports
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
Port P7
Internal peripheral functions
Timer
Timer TA0 (16 bits)
Timer TA1 (16 bits)
Timer TA2 (16 bits)
Timer TA3 (16 bits)
Timer TA4 (16 bits)
Timer TB0 (16 bits)
Timer TB1 (16 bits)
Timer TB2 (16 bits)
Timer TB3 (16 bits)
Timer TB4 (16 bits)
Timer TB5 (16 bits)
A-D converter
(10 bits
X
8 channels
Expandable up to 10 channels)
System clock generator
X
IN
-X
OUT
X
CIN
-X
COUT
Clock synchronous SI/O
8
Port P8
UART/clock synchronous SI/O
(8 bits
X
3 channels)
CRC arithmetic circuit (CCITT )
(Polynomial : X
16
+X
12
+X
5
+1)
(8 bits
X
2 channels)
7
Port P8
5
M16C/60 series16-bit CPU core
Registers
Program counter
PC
Vector table
INTB
Stack pointer
ISP
USP
Flag register
FLG
R0H
R0L
R0H
R0L
R1H
R1L
R1H
R1L
R2
R2
R3
R3
A0
A0
A1
A1
FB
FB
SB
Memory
ROM
(Note 1)
RAM
(Note 2)
Watchdog timer
(15 bits)
Port P9
8
DMAC
(2 channels)
Port P10
D-A converter
(8 bits X 2 channels)
Multiplier
8
Note 1: ROM size depends on MCU type.
Note 2: RAM size depends on MCU type.
Figure 1.1.3. Block diagram of M16C/62M group
4
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Performance Outline
Table 1.1.1 is a performance outline of M16C/62M group.
Table 1.1.1. Performance outline of M16C/62M group
Item
Number of basic instructions
Shortest instruction execution time
Memory
capacity
I/O port
Input port
ROM
RAM
P0 to P10 (except P8
5
)
P8
5
Performance
91 instructions
100ns(f(X
IN
)=10MH
Z
, V
CC
=2.7V to 3.6V)
142.9ns (f(X
IN
)=7MH
Z
, V
CC
=2.2V to 3.6V with software one-wait)
(See the figure 1.1.4. ROM Expansion)
10K to 20K bytes
8 bits x 10, 7 bits x 1
1 bit x 1
Multifunction TA0, TA1, TA2, TA3, TA4
16 bits x 5
timer
TB0, TB1, TB2, TB3, TB4, TB5 16 bits x 6
Serial I/O
UART0, UART1, UART2
(UART or clock synchronous) x 3
SI/O3, SI/O4
A-D converter
D-A converter
DMAC
CRC calculation circuit
Watchdog timer
Interrupt
Clock generating circuit
Supply voltage
(Clock synchronous) x 2
10 bits x (8 + 2) channels
8 bits x 2
2 channels (trigger: 24 sources)
CRC-CCITT
15 bits x 1 (with prescaler)
25 internal and 8 external sources, 4 software sources, 7 levels
2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
2.7V to 3.6V (f(X
IN
)=10MH
Z
, without software wait)
2.4V to 2.7V (f(X
IN
)=7MH
Z
, without software wait)
2.2V to 2.4V (f(X
IN
)=7MH
Z
with software one-wait)
28.5mW (f(X
IN
) =10MH
Z
, V
CC
=3V without software wait)
3V
1mA
Available (to a maximum of 1M bytes)
CMOS high performance silicon gate
100-pin plastic mold QFP
Power consumption
I/O
I/O withstand voltage
characteristics Output current
Memory expansion
Device configuration
Package
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
