Description
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de pme
Un elo
v
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Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
The M16C/80 (100-pin version) group of single-chip microcomputers are built using the high-performance
silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in a 100-pin plastic
molded QFP. These single-chip microcomputers operate using sophisticated instructions featuring a high
level of instruction efficiency. With 16M bytes of address space, they are capable of executing instructions
at high speed. They also feature a built-in multiplier and DMAC, making them ideal for controlling office,
communications, industrial equipment, and other high-speed processing applications.
The M16C/80 (100-pin version) group includes a wide range of products with different internal memory
types and sizes and various package types.
Features
• Memory capacity .................................. ROM (See ROM expansion figure.)
RAM 10/20 Kbytes
• Shortest instruction execution time ...... 50ns (f(X
IN
)=20MHz)
• Supply voltage ..................................... 4.0 to 5.5V (f(X
IN
)=20MHz) Mask ROM and flash memory version
2.7 to 5.5V (f(X
IN
)=10MHz) Mask ROM and flash memory version
• Low power consumption ...................... 45mA (M30800MC-XXXFP)
• Interrupts .............................................. 29 internal and 8 external interrupt sources, 5 software
interrupt sources; 7 levels (including key input interrupt)
• Multifunction 16-bit timer ...................... 5 output timers + 6 input timers
• Serial I/O .............................................. 5 channels for UART or clock synchronous
• DMAC .................................................. 4 channels (trigger: 31 sources)
• DRAMC ................................................ Used for EDO, FP, CAS before RAS refresh, self-refresh
• A-D converter ....................................... 10 bits X 8 channels (Expandable up to 10 channels)
• D-A converter ....................................... 8 bits X 2 channels
• CRC calculation circuit ......................... 1 circuit
Specifications written in this
• X-Y converter ....................................... 1 circuit
manual are believed to be ac-
curate, but are not guaranteed
• Watchdog timer .................................... 1 line
to be entirely free of error.
• Programmable I/O ............................... 87 lines
_______
Specifications in this manual
• Input port .............................................. 1 line (P8
5
shared with NMI pin)
may be changed for functional
or performance improvements.
• Memory expansion .............................. Available (16M bytes)
Please make sure your manual
• Chip select output ................................ 4 lines
is the latest edition.
• Clock generating circuit ....................... 2 built-in clock generation circuits
(built-in feedback resistance, and external ceramic or quartz oscillator)
Applications
Audio, cameras, office equipment, communications equipment, portable equipment, etc.
------Table of Contents------
CPU .............................................................. 11
Reset ............................................................. 16
Processor Mode ............................................ 24
Clock Generating Circuit ............................... 40
Protection ...................................................... 52
Interrupts ....................................................... 53
Watchdog Timer ............................................ 75
DMAC ........................................................... 77
Timer ............................................................. 88
Serial I/O ..................................................... 120
A-D Converter ............................................. 162
D-A Converter ............................................. 172
CRC Calculation Circuit .............................. 174
X-Y converter .............................................. 176
DRAM controller .......................................... 179
Programmable I/O Ports ............................. 186
Usage Precaution ....................................... 201
Electric characteristics ................................ 208
Flash memory version ................................. 255
1
Description
nt
r
de pme
Un elo
v
de
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Block Diagram
Figure 1.1.3 is a block diagram of the M16C/80 (100-pin version) group.
Block diagram of the M30800MC-XXXGP
8
8
8
8
8
8
8
I/O ports
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
Port P7
Internal peripheral functions
Timer
A-D converter
(10 bits X 8 channels
Expandable up to 10 channels)
UART /clock synchronous SI/O
(8 bits X 5 channels)
X-Y converter
(16 bits X 16 bits)
CRC arithmetic circuit (CCITT)
12
(Polynomial : X
16
+X +X
5
+1)
System clock generator
X
IN
- X
OUT
X
CIN
- X
COUT
8
Timer TA0 (16 bits)
Timer TA1 (16 bits)
Timer TA2 (16 bits)
Timer TA3 (16 bits)
Timer TA4 (16 bits)
Timer TB0 (16 bits)
Timer TB1 (16 bits)
Timer TB2 (16 bits)
Timer TB3 (16 bits)
Timer TB4 (16 bits)
Timer TB5 (16 bits)
Port P8
Memory
ROM
(Note 1)
7
Port P8
5
RAM
(Note 2)
M16C/80 series 16-bit CPU core
Registers
R0H
R0H
R1H
R1H
R2
R0L
R0L
R1L
Watchdog timer
(15 bits)
D-A converter
(8 bits X 2 channels)
R1L
R2
R3
A0
A1
FB
SB
FLG
INTB
ISP
USP
PC
SVF
SVP
VCT
DRAM
controller
DRAM
controller
Multiplier
Port P9
Port P10
8
8
Note 1: ROM size depends on MCU type.
Note 2: RAM size depends on MCU type.
Figure 1.1.3. Block diagram of M30800MC-XXXFP
4
Description
nt
r
de pme
Un elo
v
de
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Performance Outline
Table 1.1.1 is a performance outline of M16C/80 (100-pin version) group.
Table 1.1.1. Performance outline of M16C/80 (100-pin version) group
Item
Number of basic instructions
Shortest instruction execution time
Memory
capacity
I/O port
ROM
RAM
Performance
106 instructions
50ns(f(X
IN
)=20MHz)
See ROM expansion figure.
10/20 K bytes
8 bits x 10, 7 bits x 1
1 bit x 1
16 bits x 5
16 bits x 6
(UART or clock synchronous) x 5
10 bits x (8 + 2) channels
8 bits x 2
4 channels
CAS before RAS refresh, self-refresh, EDO, FP
CRC-CCITT
16 bits X 16 bits
15 bits x 1 (with prescaler)
29 internal and 8 external sources, 5 software sources, 7
levels
2 built-in clock generation circuits
(built-in feedback resistance, and external ceramic or
quartz oscillator)
4.2 to 5.5V (f(X
IN
)=20MHz) Mask ROM and flash
memory version
2.7 to 5.5V (f(X
IN
)=10MHz) Mask ROM and flash
memory version
45mA (f(X
IN
) = 20MHz without software wait,Vcc=5V)
Mask ROM 128 Kbytes version
5V
5mA
Available (up to 16M bytes)
–40 to 85
o
C
CMOS high performance silicon gate
100-pin plastic mold QFP
P0 to P10 (except P8
5
)
Input port
P8
5
Multifunction TA0, TA1, TA2, TA3,TA4
timer
TB0, TB1, TB2, TB3, TB4, TB5
Serial I/O
UART0, UART1, UART2,
UART3, UART4
A-D converter
D-A converter
DMAC
DRAM controller
CRC calculation circuit
X-Y converter
Watchdog timer
Interrupt
Clock generating circuit
Supply voltage
Power consumption
I/O
I/O withstand voltage
characteristics Output current
Memory expansion
Operating ambient temperature
Device configuration
Package
5
stm32/stm8
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