MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
DESCRIPTION
The 4280 Group is a 4-bit single-chip microcomputer designed
with CMOS technology for remote control transmitters. The 4280
Group has 7 carrier waves and enables fabrication of 8
×
7 key
matrix.
FEATURES
• Number of basic instructions ............................................. 62
• Minimum instruction execution time ............................ 8.0
µ
s
(at f(X
IN
) = 4.0 MHz, system clock = f(X
IN
)/8, V
DD
=3.0 V)
• Supply voltage ................................................. 1.8 V to 3.6 V
• Subroutine nesting ..................................................... 4 levels
• Timer
Timer 1 ................................................................... 8-bit timer
with a reload register and carrier wave output auto-control
function
ROM (PROM) size
(× 9 bits)
1024 words
1024 words
1024 words
1024 words
• Carrier wave output function (port CARR)
f(X
IN
), f(X
IN
)/4, f(X
IN
)/8, f(X
IN
)/12
f(X
IN
)/64, f(X
IN
)/96, “H” output fixed
• Logic operation function (XOR, OR, AND)
• RAM back-up function
• Key-on wakeup function (ports D
7
, E
0
–E
2
, G
0
–G
3
) ............. 8
• I/O port (ports D, E, G, CARR) .......................................... 16
• Oscillation circuit ..................................... Ceramic resonance
• Watchdog timer
• Power-on reset circuit
• Voltage drop detection circuit ......................... Typical:1.50 V
APPLICATION
Various remote control transmitters
Product
M34280M1-XXXFP
M34280M1-XXXGP
M34280E1FP
M34280E1GP
RAM size
(× 4 bits)
32 words
32 words
32 words
32 words
Package
20P2N-A
20P2E/F-A
20P2N-A
20P2E/F-A
ROM type
Mask ROM
Mask ROM
One Time PROM
One Time PROM
PIN CONFIGURATION (TOP VIEW)
M34280M1-XXXFP/GP
V
SS
E
2
E
1
X
IN
X
OUT
E
0
G
0
G
1
G
2
G
3
1
2
20
19
V
DD
CARR
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
M34280M1-XXXFP/GP
3
4
5
6
7
8
9
10
18
17
16
15
14
13
12
11
Outline 20P2N-A
20P2E/F-A
2
1
2
4
7
1
BLOCK DIAGRAM
I/O port
Port E
Port G
Port D
Internal peripheral functions
System clock generating circuit
X
IN
–X
OUT
Timer
Timer 1 (8 bits)
Remote control carrier wave output
Memory
ROM (Note)
1024 words
×
9 bits
RAM
32 words
×
4 bits
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
MITSUBISHI
ELECTRIC
720 Series
CPU core
ALU (4 bits)
Register A (4 bits) Register B (4 bits)
Register D (3 bits) Register E (8 bits)
Stack register SK (4 levels)
MITSUBISHI MICROCOMPUTERS
4280 Group
Note: PROM 1024 words
×
9 bits
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
PERFORMANCE OVERVIEW
Parameter
Number of basic instructions
Function
62
Minimum instruction execution time 8.0
µ
s (at 4.0 MHz system clock frequency)
Memory sizes ROM
Input/Output
ports
RAM
D
0
–D
6
D
7
E
0
–E
2
E
0
, E
1
G
0
–G
3
CARR
Timer 1
Subroutine nesting
Device structure
Package
Operating temperature range
Supply voltage
Power
dissipation
Active mode
(f(X
IN
) = 4.0 MHz, system clock = f(X
IN
)/8, V
DD
= 3 V)
M34280M1/ 1024 words
!
9 bits
E1
Output
I/O
Input
Output
I/O
Output
32 words
!
4 bits
Seven independent output ports
1-bit I/O port with the pull-down function
3-bit input port with the pull-down function
2-bit output port (E
0
, E
1
)
4-bit I/O port with the pull-down function
1-bit output port; CMOS output
8-bit timer with a reload register
4 levels (However, only 3 levels can be used when the TABP p instruction is executed)
CMOS silicon gate
20-pin plastic molded SOP (20P2N-A)/SSOP (20P2E/F-A)
–20
°C
to 85
°C
1.8 V to 3.6 V
400
µA
(f(X
IN
) = 4.0 MHz, system clock = f(X
IN
)/8, V
DD
= 3 V)
(typical value) RAM back-up mode 0.1
µ
A (at room temperature, V
DD
= 3 V)
PIN DESCRIPTION
Pin
V
DD
V
SS
X
IN
X
OUT
D
0
–D
6
D
7
Name
Power supply
Ground
System clock input
System clock output
Output port D
I/O port D
Input/Output
—
—
Input
Output
Output
I/O
Connected to a plus power supply.
Connected to a 0 V power supply.
I/O pins of the system clock generating circuit. Connect a ceramic resonator
between pins X
IN
and X
OUT
. The feedback resistor is built-in between pins X
IN
and X
OUT
.
Each pin of port D has an independent 1-bit wide output function. The output
structure is P-channel open-drain.
1-bit I/O port. For input use, turn on the built-in pull-down transistor and set the
latch of the specified bit to “0.” In addition, key-on wakeup function using “H”
level sense becomes valid. The output structure is P-channel open-drain.
E
0
–E
2
I/O port E
Output
Input
2-bit (E
0
, E
1
) output port. The output structure is P-channel open-drain.
3-bit input port. For input use (E
0
, E
1
), turn on the built-in pull-down transistor and
set the latch of the specified bit to “0.” In addition, key-on wakeup function using
“H” level sense becomes valid. Port E
2
has an input-only port and has a key-on
wakeup function using “H” level sense and pull-down transistor.
G
0
–G
3
I/O port G
I/O
4-bit I/O port. For input use, set the latch of the specified bit to “0.” The output
structure is P-channel open-drain. Port G has a key-on wakeup function using
“H” level sense and pull-down transistor.
CARR
Carrier wave output
for remote control
Output
Carrier wave output pin for remote control. The output structure is CMOS circuit.
Function
MITSUBISHI
ELECTRIC
3
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
CONNECTIONS OF UNUSED PINS
Pin
D
0
–D
7
E
0
, E
1
E
2
G
0
–G
3
Connection
Open or connect to V
DD
pin (Note 1).
Set the output latch to “1” and open, or
connect to V
DD
pin (Note 2).
Open or connect to V
SS
pin.
Set the output latch to “0” and open, or
connect to V
SS
pin.
Notes 1: Port D
7
: Set the bit 2 (PU0
2
) of the pull-down control register PU0 to “0” by software and turn the pull-down transistor OFF.
2: Set the corresponding bits (PU0
0
, PU0
1
) of the pull-down control register PU0 to “0” by software and turn the pull-down
transistor OFF.
(Note in order to set the output latch to “0” to make pins open)
• After system is released from reset, a port is in a high-impedance state until the output latch of the port is set to “0” by software.
Accordingly, the voltage level of pins is undefined and the excess of the supply current may occur.
• To set the output latch periodically is recommended because the value of output latch may change by noise or a program run away
(caused by noise).
(Note when connecting to V
SS
and V
DD
)
• Connect the unused pins to V
SS
or V
DD
at the shortest distance and use the thick wire against noise.
PORT FUNCTION
Port
Port D
Pin
D
0
–D
6
Input/
Output
Output structure
Control
bits
1 bit
Control
instructions
SD
RD
CLD
SD
RD
CLD
P-channel open-drain
SZD
Output: OEA
2 bits
Input:
3 bits
P-channel open-drain
4 bits
IAE
IAE
OGA
IAG
1 bit
OCRA
C
Pull-down function and key-on
wakeup function
PU0
PU0
Pull-down function and key-on
wakeup function
(programmable)
Pull-down function and key-on
wakeup function
(programmable)
Control
registers
Remark
Output P-channel open-drain
(7)
I/O
(1)
D
7
Port E
E
0
E
1
E
2
I/O
(2)
Input
(1)
I/O
(4)
Port G
G
0
–G
3
Port CARR
CARR
Output CMOS
(1)
DEFINITION OF CLOCK AND CYCLE
• System clock (STCK)
The system clock is the source clock for controlling this product.
It can be selected as shown below whether to use the CCK
instruction.
CCK instruction
When not using
When using
System clock
f(X
IN
)/8
f(X
IN
)
Instruction clock
f(X
IN
)/32
f(X
IN
)/4
• Instruction clock (INSTCK)
The instruction clock is a signal derived by dividing the system
clock by 4, and is the basic clock for controlling CPU. The one
instruction clock cycle is equivalent to one machine cycle.
• Machine cycle
The machine cycle is the cycle required to execute the
instruction.
4
MITSUBISHI
ELECTRIC
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
PORT BLOCK DIAGRAMS
Register Y
SD instruction
RD instruction
CLD instruction
Decoder
(Note 1)
S
R
Q
Ports D
0
–D
6
Register Y
SD instruction
RD instruction
Decoder
(Note 1)
S Q
R
CLD instruction
Pull-down
transistor
PU0
2
Port D
7
(Note 4)
Skip decision (SZD instruction)
Key-on wakeup input
Register A
A
0
OEA
instruction
A
0
Key-on wakeup input
PU0
0
Register A
A
1
A
1
OEA
instruction
D Q
T
IAE instruction
Pull-down
transistor
D Q
T
IAE instruction
(Note 1)
Port E
0
(Note 4)
(Note 1)
Port E
1
(Note 4)
Key-on wakeup input
PU0
1
IAE instruction
Pull-down
transistor
Register A
A
2
Key-on wakeup input
Port E
2
(Note 4)
(Note 1)
Pull-down
transistor
Register A
A
i
(Note 2)
A
i
Key-on wakeup input
TCA instruction
Register A
A
j
(Note 3)
Register C
OGA
instruction
D Q
T
IAG instruction
Pull-down
transistor
(Note 1)
Ports G
0
–G
3
(Note 4)
Register A
A
j
(Note 3)
TAC instruction
To timer 1
CARRY
(Note 1)
Carrier wave
output circuit
Register A
A
3
OCRA instruction
Timer 1 underflow signal
V1
2
Port CARR
D Q
T R
TCA
instruction
D Q
T R
V1
0
Carrier wave
output control
signal
Notes 1:
This symbol represents a parasitic diode.
2: i represents bits 0 to 3.
3: j represents bits 0 to 2.
4: Applied voltage must be less than V
DD
.
MITSUBISHI
ELECTRIC
5
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