MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
DESCRIPTION
The 4570 Group is a 4-bit single-chip microcomputer designed
with CMOS technology. Its CPU is that of the 4500 series using
a simple, high-speed instruction set. The computer is equipped
with a carrier wave output circuit for remote control, an 8-bit timer
with a reload register, a 10-bit timer with a reload register, and
an 8-bit timer with two reload registers.
The various microcomputers in the 4570 Group include variations
of the built-in memory size. The mask ROM version and One
Time PROM version of 4570 Group are produced as shown in
the table below.
q
System clock switch function
............................................................. f(X
IN
)/4 or not divided
q
Timers
Timer 1... 10-bit timer with a reload register and carrier wave
output auto-control function
Timer 2 ................................ 8-bit timer with a reload register
Timer 3... 8-bit timer with two reload registers and carrier wave
generation function
q
Interrupt ................................................................... 4 sources
q
Power-on reset circuit
q
Watchdog timer ............................................................ 16 bits
q
Key-on wakeup function (Ports P0, P1, and P4, ON/OFF of
port P4 can be switched)
qPull-up
transistor .............. (Ports P0, P1, and P4, ON/OFF of
port P4 can be switched)
q
Voltage drop detection circuit
q
Clock generating circuit (ceramic resonance)
FEATURES
q
Minimum instruction execution time
When f(X
IN
) is selected for system clock ....................... 1.5
µ
s
(f(X
IN
)=2.0 MHz, V
DD
=4.5 V to 5.5 V)
When f(X
IN
)/4 is selected for system clock ................. 2.86
µ
s
(f(X
IN
)=4.2 MHz, V
DD
=2.0 V to 5.5 V)
q
Supply voltage
............................. 2.5 V to 5.5 V (One Time PROM version)
....................................... 2.0 V to 5.5 V (Mask ROM version)
Product
M34570M4-XXXFP
M34570M8-XXXFP
M34570MD-XXXFP
M34570E8FP
M34570EDFP *
*: Under development (Jan. 1999)
ROM (PROM) size
(! 10 bits)
4096 words
8192 words
16384 words
8192 words
16384 words
APPLICATION
Remote control transmitter
RAM size
(! 4 bits)
128 words
128 words
128 words
128 words
128 words
Package
36P2R-A
36P2R-A
36P2R-A
36P2R-A
36P2R-A
ROM type
Mask ROM
Mask ROM
Mask ROM
One Time PROM
One Time PROM
PIN CONFIGURATION (TOP VIEW)
M34570Mx-XXXFP
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
/T
OUT
P2
0
P2
1
/INT
RESET
CNV
SS
X
OUT
X
IN
V
SS
VDCE
V
DD
CARR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Outline 36P2R-A
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
D
1
D
0
P1
3
P1
2
P1
1
P1
0
P0
3
P0
2
P0
1
P0
0
P4
3
P4
2
P4
1
P4
0
P3
3
P3
2
P3
1
P3
0
M34570Mx-XXXFP
2
4
4
10
4
4
2
BLOCK DIAGRAM
I/O port
Port P1
Port P4
Port P2
Port P3
Port D
Port P0
Internal peripheral functions
Clock generating circuit
X
IN
–X
OUT
Reset (Voltage drop detection circuit)
Timers/Carrier wave generation
Timer 1 (10 bits)
Timer 2 (8 bits)
Timer 3 (8 bits)
(Carrier wave generation)
Memory
4500 Series
CPU core
ALU(4 bits)
Register B (4 bits)
Register A (4 bits)
Register E (8 bits)
Register D (3 bits)
Stack registers SKs (8 levels)
Interrupt stack register SDP(1 level)
Watchdog timer (16 bits)
ROM (Note)
4096 to 16384 words
!
10 bits
RAM
128 words
!
4 bits
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Note: PROM 16384 words
!
10 bits for the built-in PROM version.
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
PERFORMANCE OVERVIEW
Parameter
Number of basic instructions
99
Function
Minimum instruction execution time 1.5
µ
s (f(X
IN
) = 2.0 MHz:system clock = f(X
IN
): V
DD
= 5.0 V)
2.86
µ
s (f(X
IN
) = 4.2 MHz:system clock = f(X
IN
)/4: V
DD
= 5.0 V)
Memory sizes ROM
M34570M4 4096 words
!
10 bits
M34570M8 8192 words
!
10 bits
M34570MD 16384 words
!
10 bits
M34570E8 8192 words
!
10 bits
M34570ED 16384 words
!
10 bits
128 words
!
4 bits
Output
I/O
Ten independent output ports; port D
9
is also used as the T
OUT
output pin.
4-bit I/O port; every pin of the ports has a key-on wakeup function and a pull-up function.
4-bit I/O port; every pin of the ports has a key-on wakeup function and a pull-up function.
2-bit input port, port P2
1
is also used as INT input pin.
4-bit I/O port
4-bit input port; both pull-up function and key-on wakeup function can be switched by software.
1-bit output port (CMOS output)
1-bit output pin; T
OUT
output pin is also used as port D
9
.
1-bit input pin with a key-on wakeup function. INT input pin is also used as port P2
1
.
10-bit timer with a reload register and carrier wave output auto-control function
8-bit timer with a reload register
8-bit timer with two reload registers and carrier wave generation function
4 (one for external and three for timer)
1 level
8 levels (however, only 7 levels can be used when an interrupt is used or the TABP p instruction
is executed)
CMOS silicon gate
36-pin plastic molded SSOP
–20
°C
to 70
°C
2.0 V to 5.5 V for mask ROM version (2.5 V to 5.5 V for One Time PROM version)
1.3 mA (f(X
IN
) = 4.2 MHz: system clock = f(X
IN
)/4, V
DD
=5.0 V)
0.5 mA (f(X
IN
) = 1.0 MHz: system clock = f(X
IN
), V
DD
=3.0 V)
0.1
µ
A (Ta=25
°C,
V
DD
=5V, typical value)
RAM
Input/Output
ports
D
0
–D
9
P0
0
–P0
3
P1
0
–P1
3
I/O
P2
0
, P2
1
Input
P3
0
–P3
3
I/O
P4
0
–P4
3
Input
Output
CARR
Output
T
OUT
INT
Timers
Timer 1
Timer 2
Timer 3
Interrupt
Sources
Nesting
Subroutine nesting
Device structure
Package
Operating temperature range
Supply voltage
Power
at active
dissipation
(typical value) at RAM back-up
Input
DEFINITION OF CLOCK AND CYCLE
q
System clock
The system clock is the basic clock for controlling this product.
The system clock can be selected by bit 3 of the clock control
register MR as shown in the table below.
Table Selection of system clock
System clock
MR
3
f(X
IN
)
0
f(X
IN
)/4
1
Note: f(X
IN
)/4 is selected immediately after system is released
from reset.
q
Instruction clock
The instruction clock is the standard clock for controlling CPU.
The instruction clock is a signal derived from dividing the
system clock by 3. The one cycle of the instruction clock is
equivalent to the one machine cycle.
q
Machine cycle
The machine cycle is the standard cycle required to execute
the instruction.
3
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
PIN DESCRIPTION
Pin
V
DD
V
SS
CNV
SS
RESET
Name
Power supply
Ground
CNV
SS
Reset input
Input/Output
Function
—
Connected to a plus power supply.
—
Connected to a 0 V power supply.
Input
I/O
Connect CNV
SS
to V
SS
and apply “L” (0V) to CNV
SS
certainly.
An N-channel open-drain I/O pin for a system reset. A pull-up transistor and a
capacitor are built-in this pin. When the watchdog timer causes the system to be
reset or the low-supply voltage is detected, the
RESET
pin outputs “L” level.
X
IN
X
OUT
D
0
–D
9
P0
0
–P0
3
Clock input
Clock output
Output port D
I/O port P0
Input
Output
Output
I/O
I/O pins of the clock generating circuit. Connect a ceramic resonator between X
IN
pin and X
OUT
pin. A feedback resistor is built-in between them.
Each pin of port D has an independent 1-bit wide output function. Port D
9
is also
used as T
OUT
output pin. The output structure is N-channel open-drain.
4-bit I/O port. It can be used as an input port when the output latch is set to “1.”
The output structure is N-channel open-drain. Every pin of the ports has a key-on
wakeup function and a pull-up function.
4-bit I/O port. It can be used as an input port when the output latch is set to “1.”
The output structure is N-channel open-drain. Every pin of the ports has a key-on
wakeup function and a pull-up function.
2-bit input port. Port P2
1
is also used as the INT input pin.
4-bit I/O port. It can be used as an input port when the output latch is set to “1.”
The output structure is N-channel open-drain.
4-bit input port. Every pin of the ports has a key-on wakeup function and a pull-up
function. Both functions can be switched by software.
Carrier wave output pin for remote control transmit. The output structure is the
CMOS circuit.
INT input pin accepts an external interrupt and has a key-on wakeup function. INT
input pin is also used as port P2
1
.
T
OUT
output pin has the function to output the timer 2 underflow signal divided by
2. T
OUT
output pin is also used as port D
9
.
VDCE pin is used to control the operation/stop of the voltage drop detection circuit.
The circuit is operating when “H” level is input to the VDCE pin. It is stopped when
“L” level is input to this pin.
P1
0
–P1
3
I/O port P1
I/O
P2
0
, P2
1
P3
0
–P3
3
P4
0
–P4
3
CARR
INT
T
OUT
VDCE
Input port P2
I/O port P3
Input port P4
Carrier wave output
for remote control
Interrupt input
Timer output
Voltage drop
detection circuit
enable
I/O
I/O
Input
Output
Input
Output
Input
4
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MULTIFUNCTION
Pin
D
9
T
OUT
Multifunction
T
OUT
Pin
D
9
P2
1
Multifunction
P2
1
INT
INT
Notes 1: Pins except above have just single function.
2: The port D
9
is the output port and port P2
1
is the input port.
CONNECTIONS OF UNUSED PINS
Pin
D
0
–D
8
D
9
/T
OUT
P0
0
–P0
3
P1
0
–P1
3
Connection
Connect to V
SS
, or set the output latch to P3
0
–P3
3
“0” and open.
Set the output latch to “1” and open.
P4
0
–P4
3
CARR
Pin
Connection
Connect to V
SS
, or set the output latch to
“0” and open.
Connect to V
SS
(Note 2) or open (Note 3).
Open.
P2
0
, P2
1
/INT
Connect to V
SS
(Note 1).
Notes 1: When the P2
1
/INT pin is connected to V
SS
pin, set the return level to “H” level by software (interrupt control register I1
2
=“1”).
When the P2
1
/INT pin is connected to V
SS
pin while the return level is set to “L” level, system returns from RAM back-up
state immediately after system enters the RAM back-up state.
2: In order to connect ports P4
0
–P4
3
to V
SS
, turn off their pull-up transistors (pull-up control register PU0i=“0”) by software and
also invalidate the key-on wakeup functions (key-on wakeup control register K0i=“0”). When these pins are connected to
V
SS
while the key-on wakeup functions are left valid, the system fails to return from RAM back-up state. In order to make
these pins open, turn on their pull-up transistors (register PU0i=“1”) by software (i = 0, 1, 2, 3).
Be sure to select the key-on wakeup function and the pull-up function with every one port.
3: In order to make ports P4
0
–P4
3
open, turn on their pull-up transistors (register PU0i = “1”) by software (i = 0, 1, 2, 3).
(Note in order to set the output latch to “0” or “1” or make pins open)
• After system is released from reset, a port is in a high-impedance state until the output latch of the port is set to “0” by software.
Accordingly, the voltage level of pins is undefined and the excess of the supply current may occur.
• To set the output latch periodically is recommended because the value of output latch may change by noise or a program run away
(caused by noise).
(Note in order to connect unused pins to V
SS
)
• To avoid noise, connect the unused pins to V
SS
at the shortest distance using a thick wire.
PORT FUNCTION
Port
Port D
Pin
D
0
–D
8
, D
9
/T
OUT
Input/
Output
Output
(10)
Port P0
Port P1
Port P2
P0
0
–P0
3
P1
0
–P1
3
P2
0
P2
1
/INT
P3
0
–P3
3
P4
0
–P4
3
I/O
(4)
I/O
(4)
Input
(2)
I/O
Input
(4)
N-channel open-drain
2
N-channel open-drain
N-channel open-drain
4
4
Output structure
N-channel open-drain
Control
bits
1
Control
instructions
SD
RD
CLD
OP0A
IAP0
OP1A
IAP1
IAP2
SNZI0
4
4
(Note)
OP3A
IAP3
Port P4
IAP4
PU0
K0
Pull-up functions
(programmable)
Key-on wakeup functions
(programmable)
Note: Level of the P2
1
/INT pin can be examined with the SNZI0 instruction.
Key-on wakeup function
Pull-up functions
Key-on wakeup functions
Pull-up functions
Key-on wakeup functions
Control
registers
W2
2
T
OUT
pin
Remark
W2
2
controls the switch of D
9
/
Port P3
5
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