HD66727
(Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver
with Key Scan Function)
Description
The HD66727, dot-matrix liquid crystal display controller and driver LSI incorporating a key scan
function, displays alphanumerics, katakana, hiragana, and symbols. It can be configured to drive a dot-
matrix liquid crystal display and control key scan functions under the control of an I
2
C bus or a clock-
synchronized serial microprocessor. A single HD66727 is capable of displaying up to four 12-character
lines, 40 segments, and 12 annunciators, and controlling up to a 4-by-8 key matrix, and driving three LED.
The HD66727 incorporates all the functions required for driving a dot-matrix liquid crystal display such as
display RAM, character generator, and liquid crystal drivers, and it also incorporates a booster for the LCD
power supply and key scan functions.
The HD66727 provides various functions to reduce the power consumption of an LCD system such as low-
voltage operation of 2.4V or less, a booster for generating a maximum of triple LCD drive voltage from the
supplied voltage, and voltage-followers for decreasing the direct current flow in the LCD drive bleeder-
resistors. Combining these hardware functions with software functions such as standby and sleep modes
allows a fine power control. The HD66727, with the above functions, is suitable for any portable battery-
driven product requiring long-term driving capabilities and small size.
Features
•
•
•
•
Control and drive of a dot-matrix LCD with built-in key scan functions
Four 12-character lines, 40 segments, and 12 annunciators
Control of up to a 4
×
8-key matrix, 3 LED ports and 3 general ports
Low-power operation support:
2.4 to 5.5V (low voltage)
Double or triple booster for liquid crystal drive voltage
Contrast adjuster and voltage followers for decreasing the direct current flow in the LCD drive
bleeder-resistors
Standby mode and sleep mode
Displays up to 12 static annunciators
•
I
2
C bus or clock-synchronized serial interface
•
60
×
8-bit display data RAM (60 characters max)
HD66727
•
11,520-bit character generator ROM
240 characters (6
×
8 dots)
•
32
×
6-bit character generator RAM
4 characters (6
×
8 dots)
•
8
×
6-bit segment RAM
40 segment-icons and marks max
•
60-segment
×
34-common liquid crystal display driver
•
Programmable display sizes and duty ratios (see Table 1)
•
Vertical smooth scroll
•
Vertical double-height display of all character fonts
•
Horizontal double display with dedicated character fonts (6-dot font width used)
•
Wide range of instruction functions:
Clear display, display on/off control, icon and mark control, character blink, white-black inverting
blinking cursor, icon and mark blink, return home, cursor on/off, white-black inverting raster-row
•
Internal oscillation with an external resistor
•
Hardware reset
•
Wide range of LCD drive voltages
3.0V to 13.0V
•
Slim chip with bumps for chip-on-glass (COG) mounting, slim chip without bumps for chip-on-board
(COB) mounting, and tape carrier package (TCP) (under development)
Table 1
Programmable Display Sizes and Duty Ratios
Multi-
plexed-
Drive
Segments
40
40
40
40
Static-
Drive
Annu-
Scanned
nciators Keys
12
12
12
12
32 (4
×
8)
32 (4
×
8)
32 (4
×
8)
32 (4
×
8)
Display
Size
1 line
×
12
characters
Duty
Ratio
1/10
Oscillation
Frequency
40 kHz
80 kHz
120 kHz
160 kHz
Current
Consumption
8
µA
15
µA
23
µA
30
µA
LED
Drive
3
3
3
3
General
Port
3
3
3
3
2 lines
×
12 1/18
characters
3 lines
×
12 1/26
characters
4 lines
×
12 1/34
characters
Note: Current consumption excludes that for LCD power supply source; V
CC
= 3V.
2
HD66727
Type Name
Type Name
HD66727A03TA0
HCD66727A03
HCD66727A03BP
HD66727A04TA0
HCD66727A04
HCD66727A04BP
External
Dimension
TCP
Bare chip
Au-bumped chip
TCP
Bare chip
Au-bumped chip
2.4V to 5.5V
PHS & Pager fonts
Operation Voltage
2.4V to 5.5V
Internal Font
Japanese and European fonts
3
HD66727
LCD-II Family Comparison
Item
Power supply voltage
LCD-II
(HD44780U)
2.7V to 5.5V
HD66702R
5V
±
10% (standard)
2.7 V to 5.5V
(low voltage)
3.0V to 8.3V
20 characters
×
2 lines
HD66710
2.7V to 5.5V
HD66712U
2.7V to 5.5V
Liquid crystal drive
voltage
Maximum display -
characters per chip
3.0 to 11.0V
8 characters
×
2 lines
3.0 to 13.0V
16 characters
×
2 lines/
8 characters
×
4 lines
40
1/17 and 1/33
9,600 bits
(240 5-×-8 dot
characters)
2.7 to 11.0V
24 characters
×
2 lines/
12 characters
×
4 lines
60 (extended to 80)
1/17 and 1/33
9,600 bits
(240 5-×-8 dot
characters)
Segment display
Display duty ratio
CGROM
None
1/8, 1/11, and
1/16
9,920 bits
(208 5-×-8 dot
characters and
32 5-×-10 dot
characters)
64 bytes
80 bytes
None
40
16
A
External resistor
or external clock
270 kHz
±
30%
None
None
External
None
None
Independent
control signal
Internal reset
circuit
Impossible
None
1/8, 1/11, and
1/16
7,200 bits
(160 5-×-7 dot
characters and
32 5-×-10 dot
characters)
64 bytes
80 bytes
None
100
16
B
External resistor
or external clock
320 kHz
±
30%
None
None
External
None
None
Independent
control signal
Internal reset
circuit
Impossible
Impossible
1 or 2
None
4 or 8 bits
144-pin FQFP2020
144-pin bare chip
CGRAM
DDRAM
SEGRAM
Segment signals
Common signals
Liquid crystal drive
waveform
Clock source
Rf oscillation frequency
Liquid crystal voltage
booster circuit
Liquid crystal drive
operational amplifier
Bleeder-resistor for liquid
crystal drive
Liquid crystal contrast
adjuster
Key scan circuit
Extension driver control
signal
Reset function
Horizontal smooth scroll
64 bytes
80 bytes
8 bytes
40
33
B
External resistor
or external clock
270 kHz
±
30%
Double or triple
booster circuit
None
External
None
None
Used in common
with a driver
output pin
Internal reset
circuit
Dot unit
Impossible
1, 2, or 4
Low power mode
4 or 8 bits
100-pin QFP1420
100-pin TQFP1414
100-pin bare chip
64 bytes
80 bytes
16 bytes
60
34
B
External resistor
or external clock
270 kHz
±
30%
Double or triple
booster circuit
None
External
None
None
Independent
control signal
Internal reset
circuit or reset input
Dot unit and
line unit
Impossible
1, 2, or 4
Low power mode
Serial, 4, or 8 bits
128-pin TCP
128-pin bare chip
Vertical smooth scroll
Impossible
Number of displayed lines 1 or 2
Low power control
Bus interface
Package
None
4 or 8 bits
80-pin QFP1420
80-pin TQFP1414
80-pin bare chip
4
HD66727
LCD-II Family Comparison (cont)
Item
Power supply voltage
Liquid crystal drive
voltage
Maximum display
characters per chip
HD66720
2.7V to 5.5V
3.0 to 11.0V
10 characters
×
1 line/
8 characters
×
2 lines
42 (extended to 80)
1/9 and 1/17
9,600 bits
(240 5-×-8 dot
characters)
64 bytes
40 bytes
16 bytes
42
17
B
External resistor
or external clock
160 kHz
±
30%
HD66717
2.4V to 5.5V
3.0 to 13.0V
12 characters
×
1 line/2 lines/3 lines/4 lines
HD66727
2.4V to 5.5V
3.0 to 13.0V
12 characters
×
1 line/2 lines/3 lines/4 lines
Segment display
Display duty ratio
CGROM
40 (and 10 annunciators)
1/10, 1/18, 1/26, and 1/34
9,600 bits
(240 5-×-8 dot
characters)
32 bytes
60 bytes
8 bytes
60
34
B
External resistor
or external clock
1-line mode: 40 kHz
±
30%
2-line mode: 80 kHz
±
30%
3-line mode: 120 kHz
±
30%
4-line mode: 160 kHz
±
30%
Double or triple
booster circuit
Built-in for each V1 to V5
Internal 1/4 and 1/6 bias
resistors
Incorporated
None
None
Reset input
Impossible
Dot (raster-row) unit
1, 2, 3, or 4
Standby mode and
sleep mode
I
2
C, serial, 4, or 8 bits
Slim chip with/without bumps
TCP
40 (and 12 annunciators)
1/10, 1/18, 1/26, and 1/34
11,520 bits
(240 6-×-8 dot
characters)
32 bytes
60 bytes
8 bytes
60
34
B
External resistor
or external clock
1-line mode: 40 kHz
±
30%
2-line mode: 80 kHz
±
30%
3-line mode: 120 kHz
±
30%
4-line mode: 160 kHz
±
30%
Double or triple
booster circuit
Built-in for each V1 to V5
Internal 1/4 and 1/6 bias
resistors
Incorporated
4
×
8 = 32 keys
None
Reset input
Impossible
Dot (raster-row) unit
1, 2, 3, or 4
Standby mode and
sleep mode
I
2
C or clock-synchronized serial
Slim chip with/without bumps
TCP
CGRAM
DDRAM
SEGRAM
Segment signals
Common signals
Liquid crystal drive
waveform
Clock source
Rf oscillation frequency
Liquid crystal voltage
booster circuit
Liquid crystal drive
operational amplifier
Bleeder-resistor for liquid
crystal drive
Liquid crystal contrast
adjuster
Key scan circuit
Extension driver control
signal
Reset function
Horizontal smooth scroll
Double or triple
booster circuit
None
External
None
5
×
6 = 30 keys
Independent
control signal
Internal reset
circuit or reset input
Dot unit and
line unit
Vertical smooth scroll
Impossible
Number of displayed lines 1 or 2
Low power control
Bus interface
Package
Low power mode and sleep
mode
Serial
100-pin QFP1420
100-pin TQFP1414
100-pin bare chip
5
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