Embedded DC-DC Converters Using the HIP6004
and HIP6005 (HIP6004EVAL3, HIP6005EVAL3)
Application Note
February 1997
AN9706
Author: Greg J. Miller
Introduction
Today’s high performance microprocessors present many
challenges to their power source. High power consumption,
low bus voltages, and fast load changes are the principal
characteristics which have led to the need for a switch mode
DC-DC converter local to the microprocessor.
Intel has specified a Voltage Regulator Module (VRM) for the
Pentium Pro microprocessor [1]. This specification details
the requirements imposed upon the input power source(s)
by the Pentium Pro and provides the computer industry with
a standard DC-DC converter solution. The Intersil HIP6002
and HIP6003 pulse width modulator (PWM) controllers are
targeted specifically for DC-DC converters powering the
Pentium Pro and similar high performance microprocessors.
The HIP6004 and HIP6005 PWM controllers are enhanced
versions of the HIP6002 and HIP6003, with additional
features specifically for next generation microprocessors,
including Intel’s Pentium II processor.
HIP6004/5 Reference Designs
The HIP6004/5EVAL3 is an evaluation board which highlights
the operation of the HIP6004 or the HIP6005 in an embedded
motherboard application. The evaluation board can be
configured as either a synchronous Buck (HIP6004EVAL3) or
standard Buck (HIP6005EVAL3) converter.
Common Features
• Operates in +5V or +12V Input Systems
• 5-Bit DAC with
±1%
Accuracy
• Overvoltage Protection via SCR and Fuse
• Overcurrent Protection
• Embedded Converters with Connector to accept Micro-
processor Test Tool
HIP6004EVAL3
The HIP6004EVAL3 is a synchronous Buck converter
capable of providing up to 14A of current at output voltages
from 1.3V to 3.5V. The schematic and bill-of-materials for
this design can be found in the appendix. The
HIP6004EVAL3 is very similar to the HIP6002EVAL1, which
is described in Intersil Application Note AN9668 [4]. The
HIP6004EVAL3 contains additional input and output
capacitors for more robust performance at processor load
currents up to 14A.
Intersil HIP6004 and HIP6005
The Intersil HIP6004 and HIP6005 are voltage mode
controllers with many functions needed for high performance
processors. Figure 1 shows a simple block diagram of the
HIP6004 and HIP6005. Each contains a high performance
error amplifier, a high-resolution 5-bit digital-to-analog
converter (DAC), a programmable free running oscillator,
and protection circuitry. The HIP6004 has two MOSFET
drivers for use in synchronous rectified Buck converters. The
HIP6005 omits the lower MOSFET driver for standard Buck
configurations. A more complete description of the parts can
be found in their data sheets [2, 3].
VCC
PGOOD 12
SS 3
RT
VID0
VID1
VID2
VID3
VID4
FB
20
4
5
6
7
8
10
18
OVP
19
2 OCSET
Efficiency
Figure 2 displays the HIP6004EVAL3 efficiency versus load
current for both 5V and 12V inputs and a 2.8V output with
100 linear feet per minute (LFM) of airflow. The converter
efficiency is equal to the output power divided by the input
power, which consists of the output power plus losses. For a
given input voltage and load condition, the losses are
roughly constant with variations of output voltage. Thus, the
efficiency is lower when the converter output voltage is
lower. This can be seen when comparing Figure 2 in this
application note to Figure 3 in AN9668.
MONITOR
AND
PROTECTION
OSC
15 BOOT
14 UGATE
13 PHASE
1 VSEN
HIP6004
D/A
+
9
COMP
11
GND
+
-
-
NOT
17 LGATE PRESENT
16 PGND (PINS NC)
ON HIP6005
FIGURE 1. BLOCK DIAGRAM OF HIP6004 AND HIP6005
4-26
http://www.intersil.com or 407-727-9207 | Copyright
©
Intersil Corporation 1998
Pentium® is a registered trademark of Intel Corporation.
Application Note 9706
VOUT = 2.8V
90
VIN = 5V
EFFICIENCY (%)
85
VIN = 12V
2.85V
75
COMP
(1V/DIV)
1.5V
2
4
6
8
10
12
14
I
L
5A/DIV
design under worst-case transient loads. Testing the
dynamic performance of the converter at 2.05V is more
severe than at a higher output voltage and therefore still
provides pertinent information.
80
VOUT
(50mV/DIV)
70
LOAD CURRENT (A)
FIGURE 2. HIP6004EVAL3 EFFICIENCY vs LOAD
For a given output voltage and load, the efficiency is lower at
higher input voltages. This is due primarily to higher
MOSFET switching losses and is displayed in Figure 2.
0A
TIME (50µs/DIV)
Transient Response
Figures 3 and 4 show laboratory oscillograms of the
HIP6004EVAL3 in response to a load transient application.
The load transient applied is from 0A to 14A for both figures.
In Figure 3, the transient is applied using an Intel test tool
which emulates the actual dynamic performance of the
Pentium II and other future processors. Slew rates approach
30A/µs. The input voltage is 12V and the output voltage is
programmed to 2.05V for this case.
FIGURE 4. 0A TO 14A LOAD TRANSIENT RESPONSE
+5% REGULATION LIMIT
OUTPUT VOLTAGE (V)
2.15
2.05
Figure 3 shows that the output voltage remains well within
the
±5%
regulation window, even at the more stringent 2.05V
output. The additional margin allows for temperature, life,
and sample variations. Figure 4 details the positive edge of
the load transient application, but with different conditions.
The 0A to 14A load transient was applied with a Hewlett
Packard active load (HP6060B), which is limited to about
1A/µs slew rate. In this case, the output voltage is
programmed to a more typical value of 2.8V. The converter
performance is very similar for both test conditions. Since
the slew rate of the transient is slower in Figure 4, the output
voltage drops at a slower rate but the amount of the voltage
excursion is about the same. In addition to the output
voltage, Figure 4 shows the error amplifier output (COMP)
and the output inductor current (I
L
). Notice the rapid
response of the error amplifier.
HIP6005EVAL3
1.95
-5% REGULATION LIMIT
TIME (100µs/DIV)
The HIP6005EVAL3 is a standard Buck converter capable of
providing up to 14A of current at output voltages from 1.3V
to 3.5V. The schematic and bill-of-materials for this design
can be found in the appendix. The HIP6005EVAL3 differs
from the HIP6004EVAL3 in three ways:
1. U1 is a HIP6005
2. CR3 replaces Q2 and CR2 is changed
3. L2 is a larger inductor
FIGURE 3. HIP6004EVAL3 TRANSIENT RESPONSE TO
INTEL TEST TOOL
Due to the analog nature of the HIP600x VID pins (see
HIP6004 data sheet for details), the 5 VID pins must be
grounded by installing jumpers JP0-4 on the evaluation
board when the Intel test tool is used. This programs the
converter output voltage to 2.05V, which is lower than
present microprocessors require. However, the intent of
using the Intel test tool is to validate the DC-DC converter
Efficiency
Figure 5 shows the efficiency data for the HIP6005EVAL3
under identical conditions as Figure 2 for the
HIP6004EVAL3. Comparing the two graphs reveals that the
Synchronous-Buck design is a little more efficient than the
Standard-Buck design over most of the load range.
4-27
Application Note 9706
VOUT = 2.8V
90
VIN = 5V
EFFICIENCY (%)
85
VIN = 12V
COMP
1V/DIV
1.5V
2.85V
VOUT
(50mV/DIV)
80
75
I
L
5A/DIV
70
2
4
6
8
LOAD CURRENT (A)
10
12
14
0A
TIME (50µs/DIV)
FIGURE 5. HIP6005EVAL3 EFFICIENCY vs LOAD
FIGURE 7. 0A TO 14A LOAD TRANSIENT RESPONSE
Transient Response
Figures 6 and 7 show laboratory oscillograms of the
HIP6005EVAL3 which are similar to those shown in Figures
3 and 4 for the HIP6004EVAL3. There are small differences
in the transient responses of the two different evaluation
boards. Since the HIP6005EVAL3 uses a larger output
inductor and identical control loop compensation (R5, R8,
C8, and C9), the closed-loop gain crossover frequency is
lower than for the HIP6004EVAL3. Check the
Feedback
Compensation
section of either data sheet for details on loop
compensation design. Table 1 details simulated closed-loop
bandwidth and phase margin for both reference boards at
both +5V and +12V input sources.
Output Voltage Droop with Load
Both the HIP6004EVAL3 and HIP6005EVAL3 use a droop
function to maintain output voltage regulation through load
transients with fewer (or less costly) output capacitors. With a
high di/dt load transient typical of the Pentium Pro
microprocessor, the largest deviation of the output voltage is at
the leading edge of the transient. The droop function adds a
voltage change as a function of load that counters the transient
deviation.
Figure 8 illustrates the static-load droop characteristic. With
no-load the output voltage is above the nominal output level.
The output decreases (or droops) as the load increases.
With a dynamic load, the droop function pre-biases the
output voltage to minimize the total deviation. Prior to the
application of load, the output voltage is above the nominal
level and the transient deviation results in an output lower
than the nominal level. Figure 3 illustrates the droop function
performance on the HIP6004EVAL3 converter. The transient
deviation is approximately 110mV. At light load, the output
voltage is about 50mV higher than the nominal output
voltage of 2.05V. At full load, the output voltage is about
60mV lower than nominal. The total deviation is within
±60mV
with the droop function compared to a deviation of
over
±100mV
without this function. Since the voltage
excursions at the transient edges are mainly a function of the
output capacitors, the converter uses fewer capacitors.
The HIP6004/5EVAL3 implements the droop function by
using the average voltage drop across the output inductor.
+5% REGULATION LIMIT
OUTPUT VOLTAGE (V)
2.15
2.05
1.95
-5% REGULATION LIMIT
TIME (100µs/DIV)
FIGURE 6. HIP6005EVAL3 TRANSIENT RESPONSE TO
INTEL TEST TOOL
TABLE 1. CONTROL LOOP CHARACTERISTICS
HIP6004EVAL3
IN = 5V
f
0dB
ϕ
MARGIN
37kHz
68
o
IN = 12V
74kHz
54
o
HIP6005EVAL3
IN = 5V
23kHz
74
o
IN = 12V
48kHz
64
o
4-28
Application Note 9706
OV Protection
OUTPUT VOLTAGE (V)
2.85
2.80
2.75
WITH DROOP
WITHOUT DROOP
The HIP6004/5EVAL3 contains circuitry to protect against
output overvoltage (OV) conditions. When an overvoltage
(greater than 15% over the nominal Vout) occurs, the
HIP6004 (or HIP6005) fires an SCR (Q3) and the input fuse
will open.
For applications where this feature is not necessary, the
following components may be eliminated: F1, Q3, and R4.
0
5
10
OUTPUT CURRENT (A)
15
Bulk Input Capacitors
The HIP6004/5EVAL3 boards use five 330µF aluminum
electrolytic capacitors to handle the high RMS current
ratings of a buck converter in a high-performance
microprocessor application. Each of these capacitors is
rated for about 1A of RMS current by the manufacturer. The
RMS current requirement of the total bulk input capacitor is
roughly equal to 1/2 of the converter load. If the average
processor current draw is 10A, than five input capacitors
meet this rating.
However, the capacitor manufacturer RMS current ratings
are based on worst-case ESR of the capacitors and are
conservative. Exceeding the current ratings may shorten the
life of the capacitors, but an expected life reduction from 8
years to say 5 years, for example, may be acceptable for
many applications.
With caution and working with the capacitor supplier, it may
be possible to safely remove 1-2 of the bulk input capacitors.
This action should be balanced by the relatively small cost
savings associated with the removal of the capacitors.
FIGURE 8. STATIC REGULATION OF THE HIP6004/5EVAL3
The average voltage drop equals the DC output current times
the DC winding resistance of the output inductor. Instead of
straight voltage feedback, an averaging filter (R9 and C14 in
the schematics) is added around the output inductor. This
filter communicates both the output voltage and droop
information back to the PWM controller. A resistor (R3)
increases the light-load voltage above the DAC program level.
OC Protection
Both the HIP6004EVAL3 and HIP6005EVAL3 have lossless
overcurrent (OC) protection. This is accomplished via the
current-sense function of the HIP600x family. The HIP6004
and HIP6005 sense converter load current by monitoring the
drop across the upper MOSFET (Q1 in the schematics). By
selecting the appropriate value of the OCSET resistor (R6),
an overcurrent protection scheme is employed without the
cost and power loss associated with an external current-
sense resistor. See the
Over-Current Protection
section of
either the HIP6004 and HIP6005 data sheet for details on
the design procedure for the OCSET resistor.
Output Capacitors
Low-ESR aluminum electrolytic capacitors are also used on
the output of the converter in the HIP6004/5EVAL3. This is
not the only choice for this type of application, but it is the
lowest cost. Refer to the
Component Selection Guidelines
in
the data sheets for additional information. Nine parallel
capacitors are used to meet Intel-specified regulation of
±5%
over all variations including temperature, load transients, and
component life. It is the load transient requirements which
pose the largest challenge, as discussed earlier in this
application note.
Figures 3-4 and 6-7 show that the reference designs meet
±5%
regulation in response to a 0A-14A load transient with
margin. This margin is by design to allow for manufacturing
variations in the reference voltage and the capacitors
parasitics and temperature effects. The HIP6004 and
HIP6005 voltage reference and DAC have an outstanding
accuracy of
±1%
over temperature.
For applications where cost or volume is especially
sensitive, and the
±5%
regulation number is not critical
over all worst-case situations, the number of output
capacitors may be reduced. Figures 10 and 11 show the
HIP6004EVAL3 0A-14A transient response with only five
output capacitors. These oscillograms show that the
Enable Function
The HIP6004EVAL3 and HIP6005EVAL3 can be disabled by
pulling the SS pin below 1.2V. A simple way to incorporate
an open collector ENABLE function is shown in Figure 9.
HIP6004
OR
HIP6005
ENABLE
SS
NORMAL: ENABLE = OPEN
INHIBIT: ENABLE = GND
FIGURE 9. DIODE PROVIDES ENABLE FUNCTION
Modifications for Lower Cost Solutions
The HIP6004EVAL3 and HIP6005EVAL3 reference designs
are designed with adequate margins for reliable operation
when powering Pentium Pro and future Intel processors.
Some system designers may wish to be more aggressive
with the design of the DC-DC converter to have a lower cost
solution. This section describes how the evaluation boards
can be tailored for lower-cost systems.
4-29
Application Note 9706
converter still meets
±5%
regulation with a 2.8V output, but
with less margin than with all nine output capacitors. At
lower output voltages, such as 2.0V, the converter would
not meet the regulation requirement.
Figure 12 shows the HIP6005EVAL3 transient response to a
0.2A-14A transient with only five output capacitors. Its
response also meets the regulation requirements but with
little margin. It is very likely that, with manufacturer
variations, the converter will exceed the regulation window in
response to this large of a load transient.
Changing the output filter of the converter affects the control
loop characteristics in general. Reducing the number of
output capacitors from nine to five pushes the L-C break
frequency of the output filter out slightly and increases the
0dB crossover frequency. It also reduces the amount phase
margin slightly, but there is still adequate phase margin with
five output capacitors.
OUTPUT VOLTAGE (V)
+5% REGULATION
2.90
2.80
2.70
-5% REGULATION
TIME (1ms/DIV)
FIGURE 12. HIP6004EVAL5 TRANSIENT RESPONSE WITH
C20-23 REMOVED
+5% REGULATION
2.90
OUTPUT VOLTAGE (V)
2.80
Reducing the number of output capacitors is possible but
should be examined from a system standpoint. If the
converter regulation requirement is firm at
±5%,
and the
microprocessor core voltage can approach 2V, and the
transient requirements approach 12A-14A steps, than the
unmodified reference design (with nine output capacitors)
should be employed. If one or more of these requirements is
relaxed, than the number of capacitors may be reduced with
satisfactory results.
Transient Testing with Intel Test Tool
2.70
-5% REGULATION
TIME (1ms/DIV)
FIGURE 10. HIP6004EVAL3 TRANSIENT RESPONSE WITH
C20-23 REMOVED
OUTPUT VOLTAGE (V)
2.90
When testing the transient response of the HIP6004/5EVAL3
with an Intel-supplied test tool, some care must be taken for
proper results. Jumpers JP0-4 must be installed on the
evaluation board for proper operation of the converter. This
is because the test tool uses CMOS output drivers on the
VID signals, which are incompatible with the analog nature
of VID0-4 on the HIP6004 and HIP6005. This is only an
issue with the test tool and not any known microprocessor
architecture. Grounding the five VID signals programs the
converter output voltage to 2.05V and allows transient
testing at this voltage. As shown in this application note,
transient testing at this voltage level provides validation of
the reference designs.
There is an additional jumper on the evaluation boards. JP5
is normally installed and
must
be removed if the Intel test
tool is installed and the converter input source exceeds 5.5V.
The Intel test tool uses Vcc5 for its bias source and JP5
connects IN of the evaluation board to Vcc5. If the evaluation
board IN voltage is 5V, than JP5 can remain installed. If IN is
12V, than JP5 must be removed and an external 5V must be
applied to Vcc5. See the schematics in the appendix for
more details.
2.80
2.70
-5% REGULATION
TIME (25µs/DIV)
FIGURE 11. EXPANDED VIEW OF LEADING EDGE OF
0A TO 14A TRANSIENT SHOWN IN FIGURE 10
4-30
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