UVEPROM
Austin Semiconductor, Inc.
4 MEG UVEPROM
UV Erasable Programmable
Read-Only Memory
AVAILABLE AS MILITARY
SPECIFICATIONS
• SMD 5962-91752
• MIL-STD-883
SMJ27C040
PIN ASSIGNMENT
(Top View)
32-Pin DIP (J)
(600 MIL)
V
PP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A18
A17
A14
A13
A8
A9
A11
G\
A10
E\
DQ7
DQ6
DQ5
DQ4
DQ3
FEATURES
• Organized 524,288 x 8
• Single +5V ±10% power supply
• Industry standard 32-pin dual-in-line package
• All inputs/outputs fully TTL compatible
• Static Operation (no clocks, no refresh)
• 8-bit output for use in microprocessor-based systems
• Power-saving CMOS technology
• 3-state output buffers
• 400-mV DC assured noise immunity with standarad
TTL loads
• Latchup immunity of 250 mA on all input and output
pins
• No pullup resistors required
• Low power dissipation (Vcc = 5.5V)
PActive
- 385 mW Worst Case
PStandby
- 0.55 mW Worst Case (CMOS-input levels)
Pin Name
A0 - A18
DA0-DQ7
E\
G\
GND
V
CC
Function
Address Inputs
Inputs (programming)/Outputs
Chip Enable
Output Enable
Ground
5V Supply
V
PP
13V Power Supply*
*Only in program mode.
GENERAL DESCRIPTION
The SMJ27C040 is a set of 4,194,304-bit, ultraviolet-light
erasable, electrically programmable read-only memories
(EPROMs).
These devices are fabricated using CMOS technology for
high speed and simple interface with MOS and bipolar
circuits. All inputs (including program data inputs) can be
driven by Series 54 TTL circuits. Each output can drive one
Series 54 TTL circuit without external resistors. The data
outputs are 3-state for connecting multiple devices to a
common bus.
The SMJ27C040 is offered in a 32-pin 600-mil
dual-in-line ceramic package (J suffix) rated for operation
from -55°C to 125°C.
Since this EPROM operates from a single 5V supply (in
the read mode), it is ideal for use in microprocessor-based
systems. One other (13V) supply is needed for programming.
All programming signals are TTL level. For programming
outside the system, existing EPROM programmers can be
used.
OPTIONS
• Timing
120ns access
150ns access
• Package(s)
Ceramic DIP (600mils)
MARKING
-12
-15
J
No. 114
• Operating Temperature Ranges
Military (-55
o
C to +125
o
C)
M
For more products and information
please visit our web site at
www.austinsemiconductor.com
SMJ27C040
Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
UVEPROM
Austin Semiconductor, Inc.
FUNCTIONAL BLOCK DIAGRAM*
EPROM 524,288 x 8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
E\
G\
12
11
10
9
8
7
6
5
27
26
23
25
4
28
29
3
2
30
31
22
24
0
SMJ27C040
A
0
524,287
A
A
A
A
A
A
A
A
13
14
15
17
18
19
20
21
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
18
[PWR DWN]
&
EN
* This symbol is in accordance with ANSI/IEEE std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the J package.
OPERATION
The seven modes of operation are listed in Table 1. The read mode requires a single 5V supply. All inputs are TTL level
except for V
PP
during programming (13V), and V
H
(12V)i on A9 for signature mode.
TABLE 1. OPERATION MODES
E\
Read
Output Disable
Standby
Programming
Program Inhibit
Verify
Signature Mode
* X can be V
IL
or V
IH
.
iV
H
= 12V ± 0.5V
SMJ27C040
Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
G\
V
IL
V
IH
X
V
IH
V
IH
V
IL
V
IL
V
PP
V
CC
V
CC
V
CC
V
PP
V
PP
V
PP
V
CC
FUNCTION
V
CC
A9
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
X
X
X
X
X
X
V
IH
*
A0
X
X
X
X
X
X
V
IL
V
IL
DQ0-DQ7
Data Out
High-Z
High-Z
Data In
High-Z
Data Out
MFG Code 97
Device Code 50
V
IL
V
IL
V
IH
V
IL
V
IH
V
IH
V
IL
2
UVEPROM
Austin Semiconductor, Inc.
READ/OUTPUT DISABLE
When the outputs of two or more SMJ27C040s are connected
in parallel on the same bus, the output of any particular device
in the circuit can be read with no interference from
competing outputs of the other devices. To read the output of
a single device, a low level signal is applied to the E\ and G\
pins. All other devices in the circuit should have their outputs
disabled by applying a high level signal to one of these pins.
Output data is accessed at pins Q0-Q7.
SMJ27C040
SNAP! PULSE PROGRAMMING
The SMJ27C040 is programmed by using the SNAP! Pulse
programming algorithm. The programming sequence is shown
in the SNAP! Pulse programming flow chart (Figure 1).
The initial setup is V
PP
= 13V, V
CC
= 6.5V, E\ = V
IH
, and
G\ = V
IL
. Once the initial location is selected, the data is
presented in parallel (eight bits) on pins DQ1 through DQ8.
Once addresses and data are stable, the programming mode is
achieved when E\ is pulsed low (V
IL
) with a pulse duration of
t
W(PGM)
. Every location is programmed only once before
going to interactive mode.
In the interactive mode, the word is verified at V
PP
= 13V,
V
CC
= 6.5V, E\ = V
IH
, and G\ = V
IL
. If the correct data is not
read, the programming is performed by pulling G\ high, then
E\ low with a pulse duration of t
W(PGM)
. This sequence of
verification and programming is performed up to a maximum
of 10 times. When the device is fully programmed, all bytes
are verified with V
CC
= V
PP
= 5V ± 10%.
LATCHUP IMMUNITY
Latchup immunity on the SMJ27C040 is a minimum of 250mA
on all inputs and outputs. This feature provides latchup
immunity beyond any potential transients at the P.C. board level
when the EPROM is interfaced to industry standard TTL or
MOS logic devices. The input/output layout approach
controls latchup without compromising performance or
packing density.
POWER DOWN
Active I
CC
supply current can be reduced from 70mA to 1mA
for a high TTL input on E\ and to 100µA for a high CMOS
input on E\. In this mode all outputs are in the high-
impedance state.
PROGRAM INHIBIT
Programming can be inhibited by maintaining high level
inputs on the E\ and G\ pins.
ERASURE
Before programming, the SMJ27C040 EPROM is erased by
exposing the chip through the transparent lid to a high
intensity ultraviolet-light (wavelength 2537 Å). The
recommended minimum exposure dose (UV intensity x
exposure time) is 15-W
.
s/cm
2
. A typical 12-mW/cm
2
,
filterless UV lamp erases the device in 21 minutes. The lamp
should be located about 2.5cm above the chip during erasure.
After erasure, all bits are in the high state. It should be noted
that normal ambient light contains the correct wavelength for
erasure. Therefore, when using the SMJ27C040, the window
should be covered with an opaque label. After erasure (all
bits in logic high state), logic lows are programmed into the
desired locations. A programmed low can be erased only by
ultraviolet light.
PROGRAM VERIFY
Programmed bits can be verified with V
PP
= 13V when
G\ = V
IL
, and E\ = V
IH
.
SIGNATURE MODE
The signature mode provides access to a binary code
identifying the manufacturer and type. This mode is activated
when A9 (pin 26) is forced to 12V. Two identifier bytes are
accessed by toggling A0. All other addresses must be held
low. The signature code for the SMJ27C040 is 9750. A0 low
selects the manufacturer’s code 97 (Hex), and A0 high
selects the device code 50 (Hex), as shown in Table 2.
TABLE 2. SIGNATURE MODES
IDENTIFIER*
MANUFACTURER CODE
DEVICE CODE
A0
V
IL
V
IH
DQ7
1
0
DQ6
0
1
DQ5
0
0
PINS
DQ4
DQ3
1
1
0
0
DQ2
1
0
DQ1
1
0
DQ0
1
0
HEX
97
50
* E\ = G\ = V
IL
, A1 - A8 = V
IL
, A9 = V
H
, A10 - A18 = V
IL
, V
PP
= V
CC
.
SMJ27C040
Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
UVEPROM
Austin Semiconductor, Inc.
SMJ27C040
FIGURE 1. SNAP! PULSE PROGRAMMING FLOW CHART
START
Address = First Location
V
CC
= 6.5V ± 0.25V, V
PP
= 13V ± 0.25V
Program One Pulse = t
W
= 100µs
Increment Address
Program
Mode
Last
Address?
No
Yes
Address = First Location
X=0
Program One Pulse = t
W
= 100µs
No
Verify
One
Byte
Pass
Last
Address?
Increment
Address
Fail
X = X+1
X = 10?
Interactive
Mode
No
Yes
V
CC
= V
PP
= 5V ± 0.5V
Yes
Device Failed
Compare
All Bytes
to Original
Data
Fail
Final
Verification
Pass
Device Passed
SMJ27C040
Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
UVEPROM
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage Range, V
CC
**...........................-0.6V to +7.0V
Supply Voltage Range, V
pp
**.........................-0.6V to +14.0V
Input Voltage Range, All inputs except A9
**
..-0.6V to +6.5V
A9.....-0.6V to +13.0V
Output Voltage Range,
with respect to V
SS
**..................................-0.6V to V
CC
+1
Minimum Operating Free-air Temperature.....................-55°C
Maximum Operating Case Temperature.........................125°C
Storage Temperature Range.............................-65°C to 150°C
SMJ27C040
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
** All voltage values are with respect to GND.
RECOMMENDED OPERATING CONDITIONS
V
CC
V
PP
V
IH
V
IL
T
A
T
C
Supply Voltage
Supply Voltage
Read Mode
SNAP! Pulse programming algorithm
Read Mode
SNAP! Pulse programming algorithm
TTL
CMOS
TTL
CMOS
2
1
High-level input voltage
Low-level input voltage
Operating free-air temperature
Operating case temperature
MIN
4.5
6.25
V
CC
-0.6
12.75
2
V
CC
-0.2
-0.5
-0.5
-55
TYP
5
6.5
13
MAX
5.5
6.75
V
CC
+0.6
13.25
V
CC
+0.5
V
CC
+0.5
0.8
0.2
+125
UNIT
V
V
V
V
V
V
V
V
°C
°C
NOTES:
1. V
CC
must be applied before or at the same time as V
PP
and removed after or at the same time as V
PP
. The deivce must not be inserted into or removed from the
board when V
PP
or V
CC
is applied.
2. V
PP
can be connected to V
CC
directly (except in the program mode). V
CC
supply current in this case would be I
CC
+ I
PP
. During programming, V
PP
must be
maintained at 13V ± 0.25V.
ELECTRICAL CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND
OPERATING FREE-AIR TEMPERATURE
V
OH
V
OL
I
I
I
O
I
PP1
I
PP2
I
CC1
PARAMETER
High-level output voltage
Low-level output voltage
Input current (leakage)
Output current (leakage)
V
PP
supply current
V
PP
supply current (during program pulse)
V
CC
supply current (standby)
1
TEST CONDITIONS
I
OH
= -400µA
I
OL
= 2.1mA
V
I
= 0V to 5.5V
V
O
= 0V to V
CC
V
PP
= V
CC
= 5.5V
V
PP
= 12.75V, T
A
-25°C
V
CC
= 5.5V, E\=V
IH
E\=V
IL
, V
CC
=5.5V
TTL-Input Level
MIN
2.4
MAX
0.4
±1
±1
10
50
1
100
UNIT
V
V
µA
µA
µA
mA
mA
µA
CMOS-Input Level V
CC
= 5.5V, E\=V
CC
t
cycle
= minimum cycle time,
outputs open
2
I
CC2
V
CC
supply current (active)
50
mA
NOTES:
1. This parameter is only sampled and not 100% tested.
2. Minimum cycle time = maximum access time.
SMJ27C040
Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
微控制器 MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
