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5962F9860201V9X

产品描述HEX 1-INPUT INVERT GATE, UUC14
产品类别逻辑    逻辑   
文件大小51KB,共2页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
下载文档 详细参数 选型对比 全文预览

5962F9860201V9X概述

HEX 1-INPUT INVERT GATE, UUC14

5962F9860201V9X规格参数

参数名称属性值
包装说明DIE,
Reach Compliance Codeunknown
JESD-30 代码X-XUUC-N14
逻辑集成电路类型INVERTER
功能数量6
输入次数1
端子数量14
输出特性OPEN-DRAIN
封装主体材料UNSPECIFIED
封装代码DIE
封装形状UNSPECIFIED
封装形式UNCASED CHIP
传播延迟(tpd)20 ns
认证状态Not Qualified
表面贴装YES
技术CMOS
端子形式NO LEAD
端子位置UPPER
总剂量300k Rad(Si) V
Base Number Matches1

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ACS05MS
Data Sheet
November 1998
File Number
4542
Radiation Hardened Hex Inverter with
Open Drain Outputs
The Radiation Hardened ACS05MS is a Hex Inverter with
open drain outputs. This device inverts a HIGH level on each
input to a LOW level on the corresponding Y output. A LOW
level on the input causes the corresponding Y output to enter
a high impedance state, which can be pulled HIGH through a
resistor to V
CC
. All inputs are buffered and the outputs are
designed for balanced propagation delay and transition times.
The ACS05MS is fabricated on a CMOS Silicon on Sapphire
(SOS) process, which provides an immunity to Single Event
Latch-up and the capability of highly reliable performance in
any radiation environment. These devices offer significant
power reduction and faster performance when compared to
ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS05MS are
contained in SMD 5962-98602. A “hot-link” is provided
on our homepage with instructions for downloading.
www.intersil.com/data/sm/index.asp
Features
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25 Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-Up Free Under any Conditions
- Total Dose. . . . . . . . . . . . . . . . . . . . . . 3 x 10
5
RAD (Si)
- SEU Immunity . . . . . . . . . . . . <1 x 10
-10
Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm
2
)
• Input Logic Levels. . . . V
IL
= (0.3)(V
CC
), V
IH
= (0.7)(V
CC
)
• Output Current . . . . . . . . . . . . . . . . . . . . . . . .
±8mA
(Min)
• Quiescent Supply Current . . . . . . . . . . . . . . 100µA (Max)
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . 20ns (Max)
Applications
• High Speed Control Circuits
• Sensor Monitoring
• Low Power Designs
Ordering Information
ORDERING NUMBER
5962F9860201VCC
ACS05D/SAMPLE-03
5962F9860201VXC
ACS05K/SAMPLE-03
5962F9860201V9A
INTERNAL MKT. NUMBER
ACS05DMSR-03
ACS05D/SAMPLE-03
ACS05KMSR-03
ACS05K/SAMPLE-03
ACS05HMSR-03
TEMP. RANGE (
o
C)
-55 to 125
25
-55 to 125
25
25
PACKAGE
14 Ld SBDIP
14 Ld SBDIP
14 Ld Flatpack
14 Ld Flatpack
Die
DESIGNATOR
CDIP2-T14
CDIP2-T14
CDFP4-F14
CDFP4-F14
N/A
Pinouts
ACS05MS
(SBDIP)
TOP VIEW
A1
Y1
A2
A2 3
Y2 4
A3 5
Y3 6
GND 7
12 Y6
11 A5
10 Y5
9 A4
8 Y4
Y2
A3
Y3
GND
ACS05MS
(FLATPACK)
TOP VIEW
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
A6
Y6
A5
Y5
A4
Y4
A1 1
Y1 2
14 V
CC
13 A6
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

5962F9860201V9X相似产品对比

5962F9860201V9X 5962F9860201VXX 5962F9860201VCX
描述 HEX 1-INPUT INVERT GATE, UUC14 AC SERIES, HEX 1-INPUT INVERT GATE, CDFP14 AC SERIES, HEX 1-INPUT INVERT GATE, CDIP14
Reach Compliance Code unknown unknown unknown
JESD-30 代码 X-XUUC-N14 R-CDFP-F14 R-CDIP-T14
逻辑集成电路类型 INVERTER INVERTER INVERTER
功能数量 6 6 6
输入次数 1 1 1
端子数量 14 14 14
输出特性 OPEN-DRAIN OPEN-DRAIN OPEN-DRAIN
封装主体材料 UNSPECIFIED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
封装形状 UNSPECIFIED RECTANGULAR RECTANGULAR
封装形式 UNCASED CHIP FLATPACK IN-LINE
传播延迟(tpd) 20 ns 20 ns 20 ns
认证状态 Not Qualified Not Qualified Not Qualified
表面贴装 YES YES NO
技术 CMOS CMOS CMOS
端子形式 NO LEAD FLAT THROUGH-HOLE
端子位置 UPPER DUAL DUAL
总剂量 300k Rad(Si) V 300k Rad(Si) V 300k Rad(Si) V
Base Number Matches 1 1 1
系列 - AC AC
最高工作温度 - 125 °C 125 °C
最低工作温度 - -55 °C -55 °C
温度等级 - MILITARY MILITARY
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