Philips Semiconductors
Product specification
Quad voltage comparator
LM139/239/239A/339/339A
/LM2901/MC3302
DESCRIPTION
The LM139 series consists of four independent precision voltage
comparators, with an offset voltage specification as low as 2.0mV
max for each comparator, which were designed specifically to
operate from a single power supply over a wide range of voltages.
Operation from split power supplies is also possible and the low
power supply current drain is independent of the magnitude of the
power supply voltage. These comparators also have a unique
characteristic in that the input common–mode voltage range
includes ground, even though they are operated from a single power
supply voltage.
The LM139 series was designed to directly interface with TTL and
CMOS. When operated from both plus and minus power supplies,
the LM139 series will directly interface with MOS logic where their
low power drain is a distinct advantage over standard comparators.
PIN CONFIGURATION
D, F, N Packages
OUTPUT 2
OUTPUT 1
V+
INPUT 1 –
INPUT 1 +
INPUT 1 –
INPUT 1 +
1
2
3
1
4
5
6
7
2
3
4
11
10
9
8
INPUT 4 +
INPUT 4 –
INPUT 3 +
INPUT 3 –
14
13
12
OUTPUT 3
OUTPUT 4
GND
TOP VIEW
FEATURES
SL00070
•
Wide single supply voltage range 2.0V
DC
to 36V
DC
or dual
•
Very low supply current drain (0.8mA) independent of supply
•
Low input biasing current 25nA
•
Low input offset current
±5nA
and offset voltage
•
Input common–mode voltage range includes ground
•
Differential input voltage range equal to the power supply voltage
•
Low output 250mV at 4mA saturation voltage
•
Output voltage compatible with TTL, DTL, ECL, MOS and CMOS
logic systems
voltage (1.0mW/comparator at 5.0V
DC
)
supplies
±1.0V
DC
to
±18V
DC
Figure 1. Pin Configuration
EQUIVALENT CIRCUIT
V
+
3.5µA
100µA
3.5µA
100µA
Q2
Q3
Q4
OUTPUT
+
INPUT
– INPUT
Q1
Q8
Q7
Q5
Q6
APPLICATIONS
•
A/D converters
•
Wide range VCO
•
MOS clock generator
•
High voltage logic gate
•
Multivibrators
ORDERING INFORMATION
DESCRIPTION
14–Pin Ceramic Dual In-Line Package (Cerdip)
14–Pin Plastic Dual In-Line Package (DIP)
14–Pin Plastic Dual In-Line Package (DIP)
14–Pin Plastic Small Outline (SO) Package
14–Pin Plastic Dual In-Line Package (DIP)
14–Pin Plastic Small Outline (SO) Package
14–Pin Plastic Dual In-Line Package (DIP)
14–Pin Plastic Small Outline (SO) Package
14–Pin Plastic Dual In-Line Package (DIP)
14–Pin Plastic Small Outline (SO) Package
14–Pin Ceramic Dual In-Line Package (Cerdip)
14–Pin Plastic Dual In-Line Package (DIP)
14–Pin Plastic Dual In-Line Package (DIP)
(1 Comparator Only)
SL00071
Figure 2. Equivalent Circuit
TEMPERATURE RANGE
–55 to +125°C
–25°C to +85°C
–25°C to +85°C
–25°C to +85°C
–40°C to +125°C
–40°C to +125°C
0 to +70°C
0 to +70°C
0 to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55 to +125°C
ORDER CODE
LM139F
LM239AN
LM239N
LM239D
LM2901N
LM2901D
LM339AN
LM339D
LM339N
MC3302D
MC3302F
MC3302N
LM139N
DWG #
0581B
SOT27-1
SOT27-1
SOT108-1
SOT27-1
SOT108-1
SOT27-1
SOT108-1
SOT27-1
SOT108-1
0581B
SOT27-1
SOT27-1
1995 Nov 27
2
853-0930 16050
Philips Semiconductors
Product specification
Quad voltage comparator
LM139/239/239A/339/339A/
LM2901/MC3302
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
V
DIFF
V
IN
P
D
V
CC
supply voltage
Differential input voltage
Input voltage
Maximum power dissipation,
T
A
=25°C (still–air)
1
F package
N package
D package
Output short–circuit to ground
2
I
IN
T
A
Input current (V
IN
<–0.3V
DC
)
3
Operating temperature range
LM139
LM239/239A
LM339/339A
LM2901
MC3302
T
STG
T
SOLD
Storage temperature range
Lead soldering temperature (10sec max)
–55 to +125
–25 to +85
0 to +70
–40 to +125
–40 to +85
–65 to +150
300
°C
°C
°C
°C
°C
°C
°C
1190
1420
1040
Continuous
50
mA
mW
mW
mW
PARAMETER
RATING
36 or
±18
36
–0.3 to +36
UNIT
V
DC
V
DC
V
DC
NOTES:
1.
Derate above 25
°C,
at the following rates:
F Package at 9.5mW/°C
N Package at 11.4mW/°C
D Package at 8.3mW/°C
2. Short circuits from the output to V+ can cause excessive heating and eventual destruction. The maximum output current is approximately
20mA independent of the magnitude of V+.
3. This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector–base junction of the
input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral
NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage
level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states
will reestablish when the input voltage, which was negative, again returns to a value greater than –0.3V
DC
.
1995 Nov 27
3
嵌入式系统
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