SiT9002
LVPECL / HCSL / LVDS / CML
Features
• World’s first differential spread spectrum oscillator
• Extremely low cycle-cycle jitter
• <30 ps (typical)
• Wide frequency range
• 1 MHz to 220 MHz
• 220 MHz to 800 MHz (contact SiTime)
• Eight spread selections (31.5KHz modulation rate)
• Center Spread: ±0.25%, ±0.5%, ±1.0%, ±2.0%
• Down Spread: -0.5%, -1.0%, -2.0%, -4.0%
• Low frequency tolerance (Spread = OFF)
• ±25 ppm or ±50 ppm
• Operating voltage
• 1.8V or 2.5 or 3.3 V
• Operating temperature range:
• Industrial, -40°C to 85°C
• Extended Commercial, -20°C to 70°C
• Small footprint
• 5.0 x 3.2 x 0.85 mm
• 7.0 x 5.0 x 0.85 mm
• Pb-free and RoHS compliant
• Ultra-reliable start up and greater immunity from interfer-
ence
PRELIMINARY
1 to 800 MHz High Performance Spread Spectrum Oscillator
Benefits
• Services most PC peripherals, networking, and consumer
applications
• Provides wide range of spread percentage for maximum
electromagnetic interference (EMI) reduction
• Up to -17dB reduction on third hormonic and -12dB on the
fundamental
• Fast time to market due to not needing to redesign the PCB
for EMI reduction
• Factory programmable for ultra-fast lead time
• No crystal or capacitors required
• Eliminates crystal qualification time
• 50%+ board saving space
• Completely quartz-free
Applications
•
•
•
•
•
•
•
•
PCI-Express
Fully Buffered DIMM
Blade Server
Router
System Clock
Networking and Coputin
Automotive Applications
Industrial Applications
Block Diagram
VDD
OUT- OUT+
Pinout
ST/OE/SD
1
6
VDD
NC
2
5
OUT-
MEMS
Resonator
High Performance
Phase Lock Loop
GND
Spread
Spectrum
Modulator
3
4
OUT+
ST/OE/SD
GND
SiTime Corporation
Rev. 1.03
990 Almanor Avenue, Suite 200
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised March 12, 2009
SiT9002
PRELIMINARY
Pin Description
Pin No.
1
Name
ST/OE/SD
Input
Pin Description
Standby or Output Enable pin for OUT+ and OUT-.
OE:
When High or Open : OUT+ and OUT- = active
When Low : OUT+ and OUT- = High Impedance state
ST:
When High or Open : OUT+ and OUT- = active
When Low : OUT+ and OUT- = High Impedance State
SD: Spread Disable - disables spread spectrum
Do not connect pin, leave it floating.
VDD power supply ground. Connect to ground
1 to 800 MHz programmable clock output. For frequencies > 800 MHz contact SiTime
1 to 800 MHz programmable clock output. For frequencies > 800 MHz contact SiTime
2
3
4
5
NC
GND
OUT+
OUT-
NA
Power
Output
Output
Absolute Maximum Ratings
Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual
performance of the IC is only guaranteed within the operational specifications, not absolute maximum ratings.
Ab
solute Maximum Table
Parameter
Storage Temperature
VDD
Theta JA ( with copper plane on VDD and GND)
Theta JC (with PCB traces of 0.010 inch to all pins)
Soldering Temperature (follow standard Pb free soldering guidelines)
Number of Program Writes
Program Retention over -40 to 125C, Process, VDD (0 to 3.6V)
Human Body Model (JESD22-A114)
Min.
-65
-0.5
–
–
–
–
–
2000
Max.
150
+4.00
TBD
TBD
260
1
1,000+
–
Unit
°C
V
°C/W
°C/W
°C
NA
years
V
Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
MIL-STD-883F, Method 1010-65-150°C (1000 cycle)
MIL-STD-883F, Method 2003
MSL1
Page 2 of 11
SiT9002
DC Electrical Specifications
PRELIMINARY
LVCMOS, 3.3V ± 10% or 2.5V ± 10% or 1.8V ± 5%, -40 to 85°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
OE or ST or SD pin
OE or ST or SDpin
Condition
Min.
70
–
–
TBD
Typ.
–
–
–
–
Max.
–
30
TBD
–
Unit
%Vdd
%Vdd
uA
uA
LVPECL, 3.3V ± 10% or 2.5V ± 10%, -40 to 85°C
Symbol
V
DD
I
DD
V
OH
V
OL
V
swing
Parameter
Supply Voltage
Supply Current
Output High Voltage
Output Low Voltage
Pk-Pk Output Voltage Swing
V
DD
= 3.3V
V
DD
= 2.5V
50 Ohm termination to V
DD
- 2.0V
See Figure 2.
Condition
Min.
2.97
2.25
–
–
V
DD
-1.1
V
DD
-2.0
600
Typ.
3.3
2.5
70
70
–
–
800
Max.
3.63
2.75
TBD
TBD
V
DD
-0.7
V
DD
-1.4
1000
Unit
V
V
mA
mA
V
V
mV
HCSL, 3.3V ±10% or 2.5V ±10%, -40 to 85°C
Symbol
V
DD
I
DD
V
OH
V
OL
V
swing
Symbol
V
DD
I
DD
V
OD1
Parameter
Supply Voltage
Supply Current
Output High Voltage
Output Low Voltage
Pk-PK Output Voltage Swing
V
DD
= 3.3V
V
DD
= 2.5V
50 Ohm termination to GND
See Figures 2,3.
Condition
Min.
2.97
2.25
–
–
1.0
0.1
600
Typ.
3.3
2.5
70
70
–
–
750
Max.
3.63
2.75
TBD
TBD
1.4
0.4
900
Unit
V
V
mA
mA
V
V
mV
LVDS, 3.3V ± 10% or 2.5V ± 10%, -40 to 85°C
Parameter
Supply Voltage
Supply Current
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
Swing Mode = High
Double load termination.
See Figure 6.
Swing Mode = High
Single load termination.
See Figure 5.
V
DD
= 3.3V
V
DD
= 2.5V
Swing Mode = Normal
Single load termination.
See Figure 5.
Condition
Min.
2.97
2.25
–
–
250
–
–
–
500
–
–
–
250
–
–
–
Typ.
3.3
2.5
70
70
350
–
1.2
–
700
–
1.2
–
350
–
1.2
–
Max.
3.63
2.75
TBD
TBD
400
50
–
50
800
50
–
50
400
50
–
50
Unit
V
V
mA
mA
mV
mV
V
mV
mV
mV
V
mV
mV
mV
V
mV
Δ
V
OD1
Δ
V
OS1
Δ
V
OD2
Δ
V
OS2
Δ
V
OD3
Δ
V
OS3
V
OS3
V
OD3
V
OS2
V
OD2
V
OS1
Page 3 of 11
SiT9002
PRELIMINARY
CML, 3.3V ± 10% or 2.5V ± 10% or 1.8V ± 5%, -40 to 85°C
Symbol
V
DD
Parameter
Supply Voltage
Condition
Min.
2.97
2.25
1.71
I
DD
Supply Current
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= 1.8V
V
OH1
V
OL1
V
swing1
V
OH2
V
OL2
V
swing2
V
OH3
V
OL3
V
swing3
Output High Voltage
Output Low Voltage
Pk-PK Output Voltage Swing
Output High Voltage
Output Low Voltage
Pk-PK Output Voltage Swing
Output High Voltage
Output Low Voltage
Pk-PK Output Voltage Swing
Swing Mode = Normal
Single Load Termination
See Figure 7.
Swing Mode = High
Single Load Termination
See Figure 7.
Swing Mode = High
Double Load Termination
See Figure 8.
Excluding Load
Termination
Current
–
–
–
V
DD
-0.1
Typ.
3.3
2.5
1.8
70
70
70
–
Max.
3.63
2.75
1.89
TBD
TBD
TBD
V
DD
Unit
V
V
V
mA
mA
mA
V
V
mV
V
V
mV
V
V
mV
V
DD
-0.5 V
DD
-0.4 V
DD
-0.3
300
400
500
V
DD
-0.1
–
V
DD
V
DD
-1.0 V
DD
-0.8 V
DD
-0.6
600
800
1000
V
DD
-0.1
300
–
400
V
DD
500
V
DD
-0.5 V
DD
-0.4 V
DD
-0.3
AC Electrical Specifications
LVPECL, 3.3V ± 10%, -40 to 85°C
Symbol
F
out
F
tol[1]
DC
t
R
/t
F
T
CCJ
Parameter
Output Frequency
Frequency Tolerance
Duty Cycle
Output Rise/Fall Time
Cycle-Cycle Jitter
20% to 80%
F
out
= 100 MHz, -0.5% down spread
F
out
= 150 MHz, -0.5% down spread
F
out
= 200 MHz, -0.5% down spread
Temp. Range = -20 to 70°C
Temp. Range = -40 to 85°C
Condition
Min.
1.0
-25
-50
45
TBD
–
–
–
Typ.
–
–
–
–
300
28
28
25
Max.
220
+25
+50
55
TBD
TBD
TBD
TBD
Unit
MHz
ppm
ppm
%
ps
ps
ps
ps
LVPECL, 2.5V ± 10%, -40 to 85°C
Symbol
F
out
F
tol[1]
DC
t
R
/t
F
T
CCJ
Parameter
Output Frequency
Frequency Tolerance
Duty Cycle
Output Rise/Fall Time
Cycle-Cycle Jitter
20% to 80%
F
out
= 100 MHz, -0.5% down spread
F
out
= 150 MHz, -0.5% down spread
F
out
= 200 MHz, -0.5% down spread
Temp. Range = -20 to 70°C
Temp. Range = -40 to 85°C
Condition
Min.
1.0
-25
-50
45
TBD
–
–
–
Typ.
–
–
–
–
300
28
28
25
Max.
220
+25
+50
55
TBD
TBD
TBD
TBD
Unit
MHz
ppm
ppm
%
ps
ps
ps
ps
Page 4 of 11
SiT9002
PRELIMINARY
HCSL, 3.3V ± 10%, -40 to 85°C
Symbol
F
out
F
tol[1]
DC
t
R
/t
F
T
CCJ
Parameter
Output Frequency
Frequency Tolerance
Duty Cycle
Output Rise/Fall Time
Cycle-Cycle Jitter
20% to 80%
F
out
= 100 MHz, -0.5% down spread
F
out
= 150 MHz, -0.5% down spread
F
out
= 200 MHz, -0.5% down spread
Temp. Range = -20 to 70°C
Temp. Range = -40 to 85°C
Condition
Min.
1.0
-25
-50
45
TBD
–
–
–
Typ.
–
–
–
–
300
28
28
25
Max.
220
+25
+50
55
TBD
TBD
TBD
TBD
Unit
MHz
ppm
ppm
%
ps
ps
ps
ps
HCSL, 2.5V ± 10%, -40 to 85°C
Symbol
F
out
F
tol
DC
t
R
/t
F
T
CCJ
[1]
Parameter
Output Frequency
Frequency Tolerance
Duty Cycle
Output Rise/Fall Time
Cycle-Cycle Jitter
Condition
Temp. Range = -20 to 70°C
Temp. Range = -40 to 85°C
20% to 80%
F
out
= 100 MHz, -0.5% down spread
F
out
= 150 MHz, -0.5% down spread
F
out
= 200 MHz, -0.5% down spread
Min.
1.0
-25
-50
45
TBD
–
–
–
Typ.
–
–
–
–
300
28
28
25
Max.
220
+25
+50
55
TBD
TBD
TBD
TBD
Unit
MHz
ppm
ppm
%
ps
ps
ps
ps
LVDS, 3.3V ± 10%, -40 to 85°C
Symbol
F
out
F
tol[1]
DC
t
R
/t
F
T
CCJ
Parameter
Output Frequency
Frequency Tolerance
Duty Cycle
Output Rise/Fall Time
Cycle-Cycle Jitter
20% to 80%
F
out
= 100 MHz, -0.5% down spread
F
out
= 150 MHz, -0.5% down spread
F
out
= 200 MHz, -0.5% down spread
Temp. Range = -20 to 70°C
Temp. Range = -40 to 85°C
Condition
Min.
1.0
-25
-50
45
TBD
–
–
–
Typ.
–
–
–
–
300
28
28
25
Max.
220
+25
+50
55
TBD
TBD
TBD
TBD
Unit
MHz
ppm
ppm
%
ps
ps
ps
ps
Note:
1. Inclusive of initial tolerance, operating temperature, rated power supply voltage change, load change, aging (1 yr @ 1 ppm), shock and vibration.
Page 5 of 11
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
