HM62256B Series
256k SRAM (32-kword
×
8-bit)
ADE-203-135F (Z)
Rev. 6.0
Nov. 13, 1997
Description
The Hitachi HM62256B Series is a CMOS static RAM organized 32,768-word
×
8-bit. It realizes higher
performance and low power consumption by employing 0.8
µm
Hi-CMOS process technology. The
device, packaged in 8
×
14 mm TSOP, 8
×
13.4 mm TSOP with thickness of 1.2 mm, 450 mil SOP (foot
print pitch width), 600 mil plastic DIP, or 300 mil plastic DIP, is available for high density mounting. It
offers low power standby power dissipation; therefore, it is suitable for battery backup systems.
Features
•
Single 5.0 V supply: 5.0 V
±
10%
•
Access time: 55 ns/70 ns/85 ns (max)
•
Power dissipation:
Active: 25 mW (typ) (f = 1 MHz)
Standby: 1.0
µW
(typ)
•
Completely static memory
No clock or timing strobe required
•
Equal access and cycle times
•
Common data input and output
Three state output
•
Directly TTL compatible all inputs and outputs
•
Battery backup operation
HM62256B Series
Ordering Information
Type No.
HM62256BLP-7
HM62256BLP-7SL
HM62256BLSP-7
HM62256BLSP-7SL
HM62256BLFP-7T
HM62256BLFP-5SLT
HM62256BLFP-7SLT
HM62256BLFP-7ULT
HM62256BLT-8
HM62256BLT-7SL
HM62256BLTM-8
HM62256BLTM-5SL
HM62256BLTM-7SL
HM62256BLTM-7UL
Access time
70 ns
70 ns
70 ns
70 ns
70 ns
55 ns
70 ns
70 ns
85 ns
70 ns
85 ns
55 ns
70 ns
70 ns
8 mm
×
13.4 mm 28-pin TSOP (TFP-28DA)
8 mm
×
14 mm 32-pin TSOP (TFP-32DA)
450-mil 28-pin plastic SOP (FP-28DA)
300-mil 28-pin plastic DIP (DP-28NA)
Package
600-mil 28-pin plastic DIP (DP-28)
Pin Arrangement
HM62256BLP/BLFP/BLSP Series
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
(Top view)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
2
HM62256B Series
Operation Table
WE
×
H
H
L
L
CS
H
L
L
L
L
OE
×
H
L
H
L
Mode
Standby
Output disable
Read
Write
Write
V
CC
current
I
SB
, I
SB1
I
CC
I
CC
I
CC
I
CC
I/O pin
High-Z
High-Z
Dout
Din
Din
Ref. cycle
—
—
Read cycle (1)to (3)
Write cycle (1)
Write cycle (2)
Note:
×:
H or L
Absolute Maximum Ratings
Parameter
Power supply voltage relative to V
SS
Terminal voltage on any pin relative to V
SS
Power dissipation
Operating temperature range
Storage temperature range
Storage temperature range under bias
Symbol
V
CC
V
T
P
T
Topr
Tstg
Tbias
Value
–0.5 to +7.0
–0.5*
1
to V
CC
+0.3*
2
1.0
0 to +70
–55 to +125
–10 to +85
Unit
V
V
W
°C
°C
°C
Notes: 1. V
T
min: –3.0 V for pulse half-width
≤
50 ns
2. Maximum voltage is 7.0 V
DC Operating Conditions
(Ta = 0 to +70°C)
Parameter
Supply voltage
Symbol
V
CC
V
SS
Input high voltage
Input low voltage
Note:
V
IH
V
IL
Min
4.5
0
2.2
–0.5*
1
Typ
5.0
0
—
—
Max
5.5
0
V
CC
+ 0.3
0.8
Unit
V
V
V
V
Notes
1. V
IL
min: –3.0 V for pulse half-width
≤
50 ns
5
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