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IDT74FCT377ATQG8

产品描述D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, QSOP-20
产品类别逻辑    逻辑   
文件大小83KB,共6页
制造商IDT (Integrated Device Technology)
标准
下载文档 详细参数 选型对比 全文预览

IDT74FCT377ATQG8概述

D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, QSOP-20

IDT74FCT377ATQG8规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称IDT (Integrated Device Technology)
零件包装代码QSOP
包装说明QSOP-20
针数20
Reach Compliance Codeunknown
ECCN代码EAR99
其他特性WITH HOLD MODE
系列FCT
JESD-30 代码R-PDSO-G20
JESD-609代码e3
长度8.65 mm
负载电容(CL)50 pF
逻辑集成电路类型D FLIP-FLOP
最大I(ol)0.048 A
湿度敏感等级1
位数8
功能数量1
端子数量20
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码SSOP
封装等效代码SSOP20,.25
封装形状RECTANGULAR
封装形式SMALL OUTLINE, SHRINK PITCH
包装方法TAPE AND REEL
峰值回流温度(摄氏度)260
电源5 V
Prop。Delay @ Nom-Sup7.2 ns
传播延迟(tpd)7.2 ns
认证状态Not Qualified
座面最大高度1.75 mm
最大供电电压 (Vsup)5.25 V
最小供电电压 (Vsup)4.75 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn) - annealed
端子形式GULL WING
端子节距0.635 mm
端子位置DUAL
处于峰值回流温度下的最长时间30
触发器类型POSITIVE EDGE
宽度3.9116 mm
Base Number Matches1

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IDT74FCT377AT/CT/DT
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS OCTAL
D FLIP-FLOP WITH
CLOCK ENABLE
FEATURES:
A, C, and D grades
Low input and output leakage
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Power off disable outputs permit "live insertion"
Available in SOIC and QSOP packages
IDT74FCT377AT/CT/DT
DESCRIPTION:
The IDT74FCT377T is an octal D flip-flop built using an advanced dual
metal CMOS technology. The IDT74FCT377T has eight edge-triggered,
D-type flip-flops with individual D inputs and O outputs. The common
buffered Clock (CP) input loads all flip-flops simultaneously when the Clock
Enable (CE) is low. The register is fully edge-triggered. The state of each
D input, one set-up time before the low-to-high clock transition, is transferred
to the corresponding flip-flop’s O output. The
CE
input must be stable only
one set-up time prior to the low-to-high transition for predictable operation.
FUNCTIONAL BLOCK DIAGRAM
D
0
CE
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D Q
CP
CP
O
0
D Q
CP
D Q
CP
D Q
CP
D Q
CP
D Q
CP
D Q
CP
D Q
CP
O
1
O
2
O
3
O
4
O
5
O
6
O
7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2009 Integrated Device Technology, Inc.
OCTOBER 2009
DSC-2630/14

IDT74FCT377ATQG8相似产品对比

IDT74FCT377ATQG8 IDT74FCT377ATQG IDT74FCT377CTSOG IDT74FCT377CTSOG8 IDT74FCT377ATSOG8 IDT74FCT377CTQG8 IDT74FCT377ATSOG IDT74FCT377CTQG
描述 D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, QSOP-20 D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, GREEN, QSOP-20 D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, GREEN, SOIC-20 D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, SOIC-20 D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, SOIC-20 D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, GREEN, QSOP-20 D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, GREEN, SOIC-20 D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, GREEN, QSOP-20
是否无铅 不含铅 不含铅 不含铅 不含铅 不含铅 不含铅 不含铅 不含铅
是否Rohs认证 符合 符合 符合 符合 符合 符合 符合 符合
零件包装代码 QSOP QSOP SOIC SOIC SOIC QSOP SOIC QSOP
包装说明 QSOP-20 GREEN, QSOP-20 SOP, SOP20,.4 SOP, SOP20,.4 SOP, SOP20,.4 SSOP, SSOP20,.25 SOP, SOP20,.4 SSOP, SSOP20,.25
针数 20 20 20 20 20 20 20 20
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown unknown
ECCN代码 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
系列 FCT FCT FCT FCT FCT FCT FCT FCT
JESD-30 代码 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609代码 e3 e3 e3 e3 e3 e3 e3 e3
长度 8.65 mm 8.6868 mm 12.8 mm 12.8 mm 12.8 mm 8.6868 mm 12.8 mm 8.6868 mm
负载电容(CL) 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF
逻辑集成电路类型 D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP
最大I(ol) 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A
湿度敏感等级 1 1 1 1 1 1 1 1
位数 8 8 8 8 8 8 8 8
功能数量 1 1 1 1 1 1 1 1
端子数量 20 20 20 20 20 20 20 20
最高工作温度 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
输出极性 TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SSOP SSOP SOP SOP SOP SSOP SOP SSOP
封装等效代码 SSOP20,.25 SSOP20,.25 SOP20,.4 SOP20,.4 SOP20,.4 SSOP20,.25 SOP20,.4 SSOP20,.25
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度) 260 260 260 260 260 260 260 260
电源 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
Prop。Delay @ Nom-Sup 7.2 ns 7.2 ns 5.2 ns 5.2 ns 7.2 ns 5.2 ns 7.2 ns 5.2 ns
传播延迟(tpd) 7.2 ns 7.2 ns 5.2 ns 5.2 ns 7.2 ns 5.2 ns 7.2 ns 5.2 ns
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1.75 mm 1.7272 mm 2.6416 mm 2.65 mm 2.65 mm 1.7272 mm 2.6416 mm 1.7272 mm
最大供电电压 (Vsup) 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V
最小供电电压 (Vsup) 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
端子面层 Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
端子形式 GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
端子节距 0.635 mm 0.635 mm 1.27 mm 1.27 mm 1.27 mm 0.635 mm 1.27 mm 0.635 mm
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
处于峰值回流温度下的最长时间 30 30 30 30 30 30 30 30
触发器类型 POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
宽度 3.9116 mm 3.937 mm 7.5 mm 7.5 mm 7.5 mm 3.937 mm 7.5 mm 3.937 mm
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) - IDT (Integrated Device Technology) IDT (Integrated Device Technology)
其他特性 WITH HOLD MODE - WITH HOLD MODE WITH HOLD MODE WITH HOLD MODE WITH HOLD MODE - WITH HOLD MODE
Base Number Matches 1 1 1 1 1 1 - -

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