The UT54ACS109E is a dual J-K positive triggered flip-flop.
A low level at the preset or clear inputs sets or resets the outputs
regardless of the other input levels. When preset and clear are
inactive (high), data at the J and K input meeting the setup time
requirements are transferred to the outputs on the positive-going
edge of the clock pulse. Following the hold time interval, data
at the J and K input can be changed without affecting the levels
at the outputs. The flip-flops can perform as toggle flip-flops
by grounding K and tying J high. They also can perform as D
flip-flops if J and K are tied together.
The devices are characterized over full military temperature
range of -55°C to +125°C.
PINOUTS
16-Lead Flatpack
Top View
CLR1
J1
K1
CLK1
PRE1
Q1
Q1
V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
CLR2
J2
K2
CLK2
PRE2
Q2
Q2
LOGIC SYMBOL
PRE1
J1
CLK1
K1
CLR1
PRE2
J2
(5)
(2)
(4)
(3)
(1)
(11)
(14)
(12)
(9)
Q2
(10)
Q2
S
J1
C1
K1
R
(6)
Q1
(7)
Q1
FUNCTION TABLE
INPUTS
PRE
L
H
L
H
H
H
H
H
CLR
H
L
L
H
H
H
H
H
CLK
X
X
X
↑
↑
↑
↑
L
J
X
X
X
L
H
L
H
X
K
X
X
X
L
L
H
H
X
OUTPUT
Q
H
L
H
1
L
Q
L
H
H
1
H
Toggle
No Change
H
L
CLK2
(13)
K2
(15)
CLR2
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and
IEC Publication 617-12.
No Change
Note:
1. The output levels in this configuration are not guaranteed to meet the mini-
mum levels for V
OH
if the lows at preset and clear are near V
IL
maximum.
In addition, this configuration is nonstable; that is, it will not persist when
either preset or clear returns to its inactive (high) level.
1
LOGIC DIAGRAM
PRE
CLK
Q
J
Q
K
CLR
RADIATION HARDNESS SPECIFICATIONS
1
PARAMETER
Total Dose
SEU Threshold
2
SEL Threshold
Neutron Fluence
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
LIMIT
1.0E6
80
120
1.0E14
UNITS
rads(Si)
MeV-cm
2
/mg
MeV-cm
2
/mg
n/cm
2
2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
DD
V
I/O
T
STG
T
J
T
LS
Θ
JC
I
I
P
D
PARAMETER
Supply voltage
Voltage any pin
Storage Temperature range
Maximum junction temperature
Lead temperature (soldering 5 seconds)
Thermal resistance junction to case
DC input current
Maximum power dissipation
LIMIT
-0.3 to 7.0
-.3 to V
DD
+ .3
-65 to +150
+175
+300
20
±10
1
UNITS
V
V
°C
°C
°C
°C/W
mA
W
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these
or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
DD
V
IN
T
C
PARAMETER
Supply voltage
Input voltage any pin
Temperature range
LIMIT
3.0 to 5.5
0 to V
DD
-55 to + 125
UNITS
V
V
°C
3
DC ELECTRICAL CHARACTERISTICS FOR THE UT54ACS109E
7
( V
DD
= 3.0V to 5.5V; V
SS
= 0V
6
; -55°C < T
C
< +125°C)
SYMBOL
V
IL
Description
Low-level input voltage
1
High-level input voltage
1
CONDITION
VDD
3.0V
5.5V
V
IH
3.0V
5.5V
I
IN
V
OL
Input leakage current
Low-level output voltage
3
High-level output voltage
3
Short-circuit output current
2 ,4
V
IN
= V
DD
or V
SS
I
OL
= 100µA
5.5V
3.0V
4.5V
V
OH
I
OH
= -100µA
3.0V
4.5V
I
OS
V
O
= V
DD
and V
SS
3.0V
5.5V
I
OL
Low level output current
9
V
IN
= V
DD
or V
SS
V
OL
= 0.4V
I
OH
High level output current
9
V
IN
= V
DD
or V
SS
V
OH
= V
DD
-0.4V
P
total
I
DDQ
C
IN
C
OUT
Power dissipation
2, 8
Quiescent Supply Current
Input capacitance
5
Output capacitance
5
C
L
= 50pF
V
IN
= V
DD
or V
SS
ƒ
= 1MHz
ƒ
= 1MHz
3.0V
5.5V
3.0V
5.5V
5.5V
3.0V
5.5V
0V
0V
2.75
4.25
-100
-200
6
8
-6
-8
2.9
0.8
10
15
15
mW/
MHz
µA
pF
pF
mA
100
200
mA
mA
2.1
3.85
-1
1
0.25
0.25
V
µA
V
MIN
MAX
0.9
1.65
V
UNIT
V
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V
IH
= V
IH
(min) + 20%, - 0%; V
IL
= V
IL
(max) + 0%, -
50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are
guaranteed to V
IH
(min) and V
IL
(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density
≤5.0E5
amps/cm
2
, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/
MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V
SS
at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose
≤
1E6 rads(Si) per MIL-STD-883 Method 1019 Condition A and section 3.11.2.
8. Power dissipation specified per switching output.
9. This value is guaranteed based on characterization data, but not tested.
ABI Research最近评选并公布了全球超高频无源和高频无源 RFID芯片的前十大制造商。 前十大超高频无源芯片制造商是： 前十大高频无源芯片制造商是： 超高频的得奖名单并不出人意外，因为实际上似乎总是前三家公司获得大订单。ABI分析家 Mike Liard称，ABI很容易就评选出 Alien、Avery,和 Raflatac为全球...[详细]
2008年7月9日，欧司朗光电半导体率先推出发光二极管光线数据文件的互联网访问平台，是全球第一家提供该类互联网资源的 LED 制造商。这些光线文件不仅描述 LED 光线的发射模式，而且还包含发射点坐标、发射方向、光线强度和波长等信息。欧司朗的互联网信息资源涵盖包括红外发光二极管 (IRED) 在内的几乎所有 LED 产品组合。透过这平台，客户们不论白天或黑夜，随时都可以获取最新的数据，这无疑为他...[详细]
ADI 近日宣布日立公司在其最新的消费类无线传输集线器 TP-WL700H 中使用 ADI 公司的 Advantiv ™高级电视解决方案 IC ，以提供高端的无线功能、灵活性和无缝高清 (HD) 连接。这款 TP-WL700H 集线器仅在日本市场供应，它是一款单机设备，专门用于为日立 Wooo UT 系列液晶电视提供无线高清娱乐内容。在日立公司最新的无线视...[详细]
消费电子
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
